xr16l784iv Exar Corporation, xr16l784iv Datasheet - Page 35

• Manufacturer Part Number: xr16l784iv
• Description: High Performance 2.97v To 5.5v Quad Uart
• Manufacturer: Exar Corporation

xr
REV. 1.2.2
MSR[0]: Delta CTS# Input Flag
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MSR[1]: Delta DSR# Input Flag
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MSR[2]: Delta RI# Input Flag
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MSR[3]: Delta CD# Input Flag
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MSR[4]: CTS Input Status
CTS# pin may function as automatic hardware flow control signal input if it is enabled and selected by Auto
CTS (EFR bit-7) and RTS/CTS flow control select (MCR bit-2). Auto CTS flow control allows starting and
stopping of local data transmissions based on the modem CTS# signal. A HIGH on the CTS# pin will stop
UART transmitter as soon as the current character has finished transmission, and a LOW will resume data
transmission. Normally MSR bit-4 bit is the complement of the CTS# input. However in the loopback mode, this
bit is equivalent to the RTS# bit in the MCR register. The CTS# input may be used as a general purpose input
when the modem interface is not used.
MSR[5]: DSR Input Status
This input may be used for auto DTR/DSR flow control function, see auto hardware flow control section.
Normally this bit is the complement of the DSR# input. In the loopback mode, this bit is equivalent to the DTR#
bit in the MCR register. The DSR# input may be used as a general purpose input when the modem interface is
not used.
MSR[6]: RI Input Status
Normally this bit is the complement of the RI# input. In the loopback mode this bit is equivalent to bit-2 in the
MCR register. The RI# input may be used as a general purpose input when the modem interface is not used.
MSR[7]: CD Input Status
Normally this bit is the complement of the CD# input. In the loopback mode this bit is equivalent to bit-3 in the
MCR register. The CD# input may be used as a general purpose input when the modem interface is not used.
The upper four bits 4-7 of this register sets the delay in number of bits time for the auto RS485 turn around
from transmit to receive.
MSR [7:4]
When Auto RS485 feature is enabled (FCTR bit-5=1) and RTS# output is connected to the enable input of a
RS-485 transceiver. These 4 bits select from 0 to 15 bit-time delay after the end of the last stop-bit of the last
transmitted character. This delay controls when to change the state of RTS# output. This delay is very useful in
long-cable networks.
4.10
Logic 0 = No change on CTS# input (default).
Logic 1 = The CTS# input has changed state since the last time it was monitored. A modem status interrupt
will be generated if MSR interrupt is enabled (IER bit-3.
Logic 0 = No change on DSR# input (default).
Logic 1 = The DSR# input has changed state since the last time it was monitored. A modem status interrupt
will be generated if MSR interrupt is enabled (IER bit-3.
Logic 0 = No change on RI# input (default).
Logic 1 = The RI# input has changed from a logic 0 to a logic 1, ending of the ringing signal. A modem status
interrupt will be generated if MSR interrupt is enabled (IER bit-3.
Logic 0 = No change on CD# input (default).
Logic 1 = Indicates that the CD# input has changed state since the last time it was monitored. A modem
status interrupt will be generated if MSR interrupt is enabled (IER bit-3.
Modem Status Register (MSR) - Write Only
Table 16
shows the selection. The bits are enabled by EFR bit-4.
35
HIGH PERFORMANCE 2.97V TO 5.5V QUAD UART
XR16L784