xr16v654 Exar Corporation, xr16v654 Datasheet - Page 22

• Manufacturer Part Number: xr16v654
• Description: 2.25v To 3.6v Quad Uart With 64-byte Fifo
• Manufacturer: Exar Corporation

XR16V654/654D
2.25V TO 3.6V QUAD UART WITH 64-BYTE FIFO
When software flow control is enabled
characters with the programmed Xon or Xoff-1,2 character value(s). If receive character(s) (RX) match the
programmed values, the V654 will halt transmission (TX) as soon as the current character has completed
transmission. When a match occurs, the Xoff (if enabled via IER bit-5) flag will be set and the interrupt output
pin will be activated. Following a suspension due to a match of the Xoff character, the V654 will monitor the
receive data stream for a match to the Xon-1,2 character. If a match is found, the V654 will resume operation
and clear the flags (ISR bit-4).
Reset initially sets the contents of the Xon/Xoff 8-bit flow control registers to a logic 0. Following reset the user
can write any Xon/Xoff value desired for software flow control. Different conditions can be set to detect Xon/
Xoff characters
are selected, the V654 compares two consecutive receive characters with two software flow control 8-bit
values (Xon1, Xon2, Xoff1, Xoff2) and controls TX transmissions accordingly. Under the above described flow
control mechanisms, flow control characters are not placed (stacked) in the user accessible RX data buffer or
FIFO.
In the event that the receive buffer is overfilling and flow control needs to be executed, the V654 automatically
sends an Xoff message (when enabled) via the serial TX output to the remote modem. The V654 sends the
Xoff-1,2 characters two-character-times (= time taken to send two characters at the programmed baud rate)
after the receive FIFO crosses the programmed trigger level. To clear this condition, the V654 will transmit the
programmed Xon-1,2 characters as soon as receive FIFO is less than one trigger level below the programmed
trigger level.
* After the trigger level is reached, an xoff character is sent after a short span of time (= time required to send 2 characters);
for example, after 2.083ms has elapsed for 9600 baud and 10-bit word length setting.
A special character detect feature is provided to detect an 8-bit character when bit-5 is set in the Enhanced
Feature Register (EFR). When this character (Xoff2) is detected, it will be placed in the FIFO along with normal
incoming RX data.
The V654 compares each incoming receive character with Xoff-2 data. If a match exists, the received data will
be transferred to the RX FIFO and ISR bit-4 will be set to indicate detection of special character. Although the
Internal Register Table shows Xon, Xoff Registers with eight bits of character information, the actual number of
bits is dependent on the programmed word length. Line Control Register (LCR) bits 0-1 defines the number of
character bits, i.e., either 5 bits, 6 bits, 7 bits, or 8 bits. The word length selected by LCR bits 0-1 also
determines the number of bits that will be used for the special character comparison. Bit-0 in the Xon, Xoff
Registers corresponds with the LSB bit for the receive character.
2.14
2.15
RX T
RIGGER
Auto Xon/Xoff (Software) Flow Control
Special Character Detect
16
56
60
8
Table 8
L
EVEL
(See Table
below explains this.
INT P
T
IN
16) and suspend/resume transmissions. When double 8-bit Xon/Xoff characters
ABLE
A
16
56
60
8
CTIVATION
8: A
(See Table
UTO
X
ON
/X
X
(
OFF
CHARACTERS IN RX FIFO
OFF
16), the V654 compares one or two sequential receive data
C
22
(S
HARACTER
OFTWARE
16*
56*
60*
8*
(
S
) S
) F
ENT
LOW
)
C
ONTROL
X
(
CHARACTERS IN RX FIFO
ON
C
HARACTER
16
56
0
8
(
S
) S
REV. 1.0.1
ENT
)