xr16v2652il32 Exar Corporation, xr16v2652il32 Datasheet - Page 20
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xr16v2652il32
Manufacturer Part Number
xr16v2652il32
Description
High Performance Duart With 32-byte Fifo
Manufacturer
Exar Corporation
Datasheet
1.XR16V2652IL32.pdf
(48 pages)
- Current page: 20 of 48
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XR16V2652
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO
The V2652 UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.
Figure 12
output is internally routed to the receive shift register input allowing the system to receive the same data that it
was sending. The TX, RTS# and DTR# pins are held while the CTS#, DSR# CD# and RI# inputs are ignored.
Caution: the RX input pin must be held HIGH during loopback test else upon exiting the loopback test the
UART may detect and report a false “break” signal. Also, Auto RTS/CTS flow control is not supported during
internal loopback.
F
2.20
IGURE
12. I
Internal Loopback
shows how the modem port signals are re-configured. Transmit data from the transmit shift register
NFRARED
T
RANSMIT
D
ATA
E
Transmit Shift Register
Receive Shift Register
NCODING AND
(RHR/FIFO)
(THR/FIFO)
R
20
RTS#
CTS#
DTR#
DSR#
OP2#
CD#
RI#
ECEIVE
MCR bit-4=1
D
VCC
VCC
OP1#
VCC
ATA
VCC
D
ECODING
TXA/TXB
RXA/RXB
RTSA#/RTSB#
CTSA#/CTSB#
DTRA#/DTRB#
DSRA#/DSRB#
RIA#/RIB#
CDA#/CDB#
OP2A#/OP2B#
REV. 1.0.2
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