78p2343jat Teridian Semiconductor Corporation, 78p2343jat Datasheet - Page 7

• Manufacturer Part Number: 78p2343jat
• Description: 3-port E3/ds3/sts-1 With Jitter Attenuator
• Manufacturer: Teridian Semiconductor Corporation

REGISTER DESCRIPTION
a) PA[3:0] = 0 : Global Registers
b) PA[3:0] = 1-3 : Port-Specific Registers
Note: Shaded registers in Register Table are reserved for Teridian internal use only. Accessing reserved or
undefined registers may cause undesirable operation.
Page 7 of 37
Addr
Addr
REGISTER ADDRESSING
REGISTER TABLE
Sub
Sub
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Address Bits
Assignment
MSCR
MDCR
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
Name
(R/W)
(R/W)
Name
(R/W)
JACR
(R/W)
STAT
(R/O)
INTC
Reg.
Reg.
Interrupt Control
Jitter Attenuator
Master Control
Status Monitor
Mode Control
Description
Description
PA[3]
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Bit 7
Control
PA[2]
Bit 6
Port Address

REGEN
INPOL
FERR
PDTX
JAEN
Bit 7
Bit 7
<X>
<0>
<0>
<0>
<0>
<0>
<0>
<1>
<0>
<0>
2005 Teridian Semiconductor Corporation
--
--
--
--
--
PA[1]
Bit 5
PDRX
JASL
Bit 6
Bit 6
DS3
<X>
<X>
<0>
<0>
<0>
<0>
<1>
<0>
--
--
--
--
--
--
--
--
PA[0]
Bit 4
JLBK
Bit 5
Bit 5
LBO
<X>
<0>
<0>
<0>
<1>
<0>
<0>
<0>
E3
--
--
--
--
--
--
--
--
SA[2]
Bit 3
ENDECB
LLBKA
Bit 4
Bit 4
<0>
<0>
<0>
<0>
<0>
<1>
<0>
<0>
<0>
--
--
--
--
--
--
--
Sub-Address
3-port E3/DS3/STS-1 LIU
SA[1]
Bit 2
RCLKP
LLBKB
ESP[1]
Bit 3
Bit 3
LOS
<0>
<0>
<0>
<0>
<0>
<0>
<1>
<0>
<0>
with Jitter Attenuator
--
--
--
--
--
--
SA[0]
Bit 1
TCLKP
ESP[0]
TXNW
JAER
RLBK
Bit 2
Bit 2
<0>
<0>
<0>
<0>
<0>
<0>
<1>
<1>
<0>
<0>
--
--
--
--
--
78P2343JAT
Read/
Write
R/W*
Bit 0
RXER
MON
Bit 1
Bit 1
<1>
<0>
<0>
<0>
<0>
<0>
<0>
<0>
<0>
--
--
--
--
--
--
--
Rev 2.2
JABW
SGLO
SRST
TXER
TXEN
Bit 0
Bit 0
<X>
<0>
<1>
<0>
<0>
<0>
<1>
<0>
<0>
<0>
--
--
--
--
--