ak4373 ETC-unknow, ak4373 Datasheet - Page 64

• Manufacturer Part Number: ak4373
• Description: Low Power Stereo Dac With Hp/spk-amp
• Manufacturer: ETC-unknow

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Recommended power supply range is 2.6V to 4.0V. If HVDD voltage becomes low, the output signal might be distorted
while the amplitude is maintained. Speaker-Amp is available at HPBTL bit = PSEUDO bit = “0”.
Note 21. Load impedance is total impedance of series resistance (Rseries) and piezo speaker impedance at 1kHz in
The DAC signal is input to the Speaker-amp as [(L+R)/2]. The Speaker-amp is mono and BTL output. The gain is set by
SPKG1-0 bits. Output level depends on AVDD voltage and SPKG1-0 bits.
Note 45. The output level is calculated by assuming that output signal is not clipped. In actual case, output signal may be
MS0991-E-00
34HFigure 56. Load capacitance is capacitance of piezo speaker. When piezo speaker is used, 20Ω or more series
resistors should be connected at both SPP and SPN pins, respectively.
Speaker Output (SPP/SPN pins)
clipped when DAC outputs 0dBFS signal. DAC output level should be set to lower level by setting digital
volume so that Speaker-Amp output level is 4.0Vpp (HVDD=3.3V) or 4.8Vpp (HVDD=4V) or less and output
signal is not clipped.
AVDD
3.3V
Load Capacitance (max)
Load Resistance (min)
Speaker Type
SPKG1-0 bits
HVDD
3.3V
4.0V
00
01
10
11
Table 41. Speaker Type and Power Supply Range
SPKG1-0 bits
Table 43. SPK-Amp Output Level
ALC bit = “0”
00
01
10
11
00
01
10
11
Table 42. SPK-Amp Gain
+10.65dB
+12.65dB
+4.43dB
+6.43dB
Dynamic Speaker
- 64 -
30pF
8Ω
4.15Vpp
6.75Vpp
8.50Vpp
6.75Vpp
8.50Vpp
Gain
ALC bit = “0”
SPK-Amp Output (DAC Input = 0dBFS)
3.30Vpp
3.30Vpp
4.15Vpp
ALC bit = “1”
(Note
(Note
(Note
(Note
(Note
+12.65dB
+14.65dB
+6.43dB
+8.43dB
45)
45)
45)
45)
45)
Piezo (Ceramic) Speaker
(LMTH1-0 bits = “00”)
6.37Vpp
8.02Vpp
6.37Vpp
8.02Vpp
(default)
ALC bit = “1”
50Ω
3μF
3.11Vpp
3.92Vpp
3.11Vpp
3.92Vpp
(Note
(Note
(Note
(Note
45)
45)
45)
45)
[AK4373]
2008/09