ak4358 AKM Semiconductor, Inc., ak4358 Datasheet - Page 22

• Manufacturer Part Number: ak4358
• Description: 192khz 24-bit 8ch Dac With Dsd Input
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
The AK4358 should be reset once by bringing PDN= ”L” upon power-up. The analog section exits power-down mode by
MCLK input and then the digital section exits power-down mode after the internal counter counts MCLK during 4/fs.
The AK4358 is placed in the power-down mode by bringing PDN pin “L” and the anlog outputs are floating (Hi-Z).
Figure 6 shows an example of the system timing at the power-down and power-up.
Each DAC can be powered down by each power-down bit (PW1-3) “0”. In this case, the internal register values are not
initialized and the analog output is Hi-Z. Because some click noise occurs, the analog output should be muted externally
if the click noise influences system application.
Notes:
MS0203-E-01
System Reset
Power-down
(1) The analog output corresponding to digital input has the group delay (GD).
(2) Analog outputs are floating (Hi -Z) at the power-down mode.
(3) Click noise occurs at the edge of PDN signal. This noise is output even if “0” data is input.
(4) The external clocks (MCLK, BICK and LRCK) can be stopped in the power-down mode (PDN = “L”).
(5) Please mute the analog output externally if the click noise (3) influence system application.
(6) DZF pins are “L” in the power-down mode (PDN = “L”).
Internal
D/A In
D/A Out
Clock In
MCLK, LRCK, BICK
PDN
External
MUTE
DZF
(Digital)
(Analog)
The timing example is shown in this figure.
State
(5)
Normal Operation
Figure 15. Power-down/up Sequence Example
GD
(1)
(3)
(6)
- 22 -
(4)
Mute ON
Power-down
“0” data
Don’t care
(2)
(3)
Normal Operation
GD
(1)
[AK4358]
2006/02