m40sz100y STMicroelectronics, m40sz100y Datasheet
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m40sz100y
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m40sz100y Summary of contents
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... Convert low power SRAMs into NVRAMs ■ operating voltage ■ Precision power monitoring and power switching circuitry ■ Automatic write-protection when V tolerance ■ Choice of supply voltages and power-fail deselect voltages: – M40SZ100Y 4.5 to 5.5V; CC 4.20V V 4.50V PFD – M40SZ100W 2.7 to 3.6V; CC 2.55V V 2 ...
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Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of tables Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Description The M40SZ100Y/W NVRAM Controller is a self-contained device which converts a standard low-power SRAM into a non-volatile memory. A precision voltage reference and comparator monitors the V input for an out-of-tolerance condition. CC When an invalid V CC inactive to write protect the stored data in the SRAM. During a power failure, the SRAM is switched from the V 16-lead SOIC) to provide the energy required for data retention ...
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... Supply voltage output Supply voltage Back-up supply voltage Power fail input Power fail output Ground Not connected internally RST OUT M40SZ100Y 5 M40SZ100W 12 PFI RSTIN PFO BAT CON AI03935 ...
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... PFI 1.25V 1. Open drain output OUT PFI M40SZ100Y M40SZ100W RSTIN RST PFO CON AI03934 COMPARE ...
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... Figure 5. Hardware hookup Regulator Unregulated V IN Voltage From Microprocessor User supplied for the 16-pin package 8/25 3.0V, 3. OUT 0.1 F M40SZ100Y M40SZ100W E RSTIN E CON PFI PFO V SS RST (1) V BAT 1Mb or 4Mb 0.1 F LPSRAM E To Microprocessor NMI To Microprocessor Reset To Battery Monitor Circuit ...
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... Controller. There are, however some criteria which should be used in making the final choice of which SRAM to use. The SRAM must be designed in a way where the chip enable input disables all other inputs to the SRAM. This allows inputs to the M40SZ100Y/W and SRAMs to be “Don't care” once V ...
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Caution: Take care to avoid inadvertent discharge through V attached. For a further more detailed review of lifetime calculations, please see Application Note AN1012. Figure 6. Power down timing PFD (max) V PFD V PFD (min) V ...
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... SS tR tCER tEPD tREC (1) Parameter fall time CC fall time rise time CC M40SZ100Y M40SZ100W rise time = –40 to 85° 2.7 to 3.6V or 4.5 to 5.5V(except where noted may result in deselection/write protection not occurring until 200 µs after F may cause corruption of RAM data. FB tEPD VALID ...
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... Power-on reset output All microprocessors have a reset input which forces them to a known state when starting. The M40SZ100Y/W has a reset output (RST) pin which is guaranteed to be low by V (see Table 7 on page resistor to V should be chosen to control the rise time. This signal will be valid for all ...
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... Typically PFI is connected through an external voltage divider (see Figure 5 on page regulated output of the V voltage at PFI falls below V M40SZ100Y/W or the microprocessor drops below the minimum operating voltage. During battery back-up, the power-fail comparator turns off and PFO goes (or remains) low. This occurs after V irrespective of V PFI the inputs are recognized ...
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Figure 9. Supply voltage protection 14/ 0.1 F DEVICE V SS AI00622 ...
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... Negative undershoots below –0.3V are not allowed on any pin while in the battery back-up mode. Caution: Do NOT wave solder SOIC to avoid damaging SNAPHAT sockets. Parameter SNAPHAT off) CC SOIC –0 M40SZ100Y M40SZ100W Value Unit – °C –55 to 125 °C 260 °C +0 ...
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... Ambient operating temperature Load capacitance (C Input rise and fall times Input pulse voltages Input and output timing ref. voltages Figure 10. AC testing load circuit Note 100pF for M40SZ100Y and 50pF for M40SZ100W. 16/25 conditions. Designers should check that the operating conditions ) L 0.2 to 0.8V 0.3 to 0.7V ...
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... Input high voltage IH V Input low voltage IL (7) V Output high voltage OH ( battery back-up OHB OH Output low voltage V Output low voltage OL (9) (open drain) (1)(2) M40SZ100Y (1) Test condition Min Typ Outputs open – OUT CC V > V – 0.3 ...
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... V BAT 7. For PFO pin (CMOS). 8. Chip enable output (E ) can only sustain CMOS leakage currents in the battery back-up mode. Higher leakage currents CON will reduce battery life. 9. For RST & BL pins (open drain). 18/25 M40SZ100Y (1) Test condition Min Typ 4.4 4. 5V(Y) 1 ...
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Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner ...
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Figure 13. SOH28 – 28-lead plastic small outline, 4-socket battery SNAPHAT, package outline B Note: Drawing is not to scale. Table 9. SOH28 – 28-lead plastic small outline, battery SNAPHAT, pack. mech. data Symbol Typ ...
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Figure 14. SH – 4-pin SNAPHAT housing for 48mAh battery, package outline Note: Drawing is not to scale. Table 10. SH – 4-pin SNAPHAT housing for 48mAh battery, package mechanical data Symbol Typ ...
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Figure 15. SH – 4-pin SNAPHAT housing for 120mAh battery, package outline Note: Drawing is not to scale. Table 11. SH – 4-pin SNAPHAT housing for 120mAh battery, package mechanical data Symbol Typ ...
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Part numbering Table 12. Ordering information scheme Example: Device type M40SZ Supply voltage and write protect voltage 100Y = V = 4.5 to 5.5V 100W = V = 2.7 to 3.6V Package MQ = SO16 ...
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... M40SZ100, M40SZ100Y, M40SZ100W, 40SZ100, 40SZ100Y, 40SZ100W, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZE- ROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZE- ROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, ...
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... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...