sx18ac ETC-unknow, sx18ac Datasheet - Page 5
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sx18ac
Manufacturer Part Number
sx18ac
Description
Configurable Communications Controllers With Ee/flash Program Memory, In-system Programming Capability And On-chip Debug
Manufacturer
ETC-unknow
Datasheet
1.SX18AC.pdf
(52 pages)
2.0 CONNECTION DIAGRAMS
2.1 Pin Assignments
2.2 Pin Descriptions
© 2000 Scenix Semiconductor, Inc. All rights reserved.
Note:I = input, O = output, I/O = Input/Output, P = Power, TTL = TTL input, CMOS = CMOS input,
RTCC
MCLR
OSC1/In/Vpp
OSC2/Out
RA2
RA3
RB0
RB1
RB2
RB3
Vss
Name
RTCC
MCLR
RA0
RA1
RA2
RA3
RB0
RB1
RB2
RB3
RB4
RB5
RB6
RB7
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
Vss
V
ST = Schmitt Trigger input, MIWU = Multi-Input Wakeup input
dd
SX 18-PIN
9
DIP/SOP
1
2
3
4
5
6
7
8
Pin Type Input Levels
18
17
16
15
14
13
12
11
10
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
P
P
I
I
I
RA1
RA0
OSC1
OSC2
V
RB7
RB6
RB5
RB4
dd
TTL/CMOS/ST
TTL/CMOS/ST
TTL/CMOS/ST
TTL/CMOS/ST
TTL/CMOS/ST
TTL/CMOS/ST
TTL/CMOS/ST
TTL/CMOS/ST
TTL/CMOS/ST
TTL/CMOS/ST
TTL/CMOS/ST
TTL/CMOS/ST
TTL/CMOS/ST
TTL/CMOS/ST
TTL/CMOS/ST
TTL/CMOS/ST
TTL/CMOS
TTL/CMOS
TTL/CMOS
TTL/CMOS
CMOS
RTCC
MCLR
ST
ST
ST
RA2
RA3
RB0
RB1
RB2
RB3
–
–
Vss
Vss
SX 20-PIN
9
10
1
2
3
4
5
6
7
8
SSOP
Bidirectional I/O Pin; symmetrical source / sink capability
Bidirectional I/O Pin; symmetrical source / sink capability
Bidirectional I/O Pin; symmetrical source / sink capability
Bidirectional I/O Pin; symmetrical source / sink capability
Bidirectional I/O Pin; comparator output; MIWU input
Bidirectional I/O Pin; comparator negative input; MIWU input
Bidirectional I/O Pin; comparator positive input; MIWU input
Bidirectional I/O Pin; MIWU input
Bidirectional I/O Pin; MIWU input
Bidirectional I/O Pin; MIWU input
Bidirectional I/O Pin; MIWU input
Bidirectional I/O Pin; MIWU input
Bidirectional I/O pin
Bidirectional I/O pin
Bidirectional I/O pin
Bidirectional I/O pin
Bidirectional I/O pin
Bidirectional I/O pin
Bidirectional I/O pin
Bidirectional I/O pin
Input to Real-Time Clock/Counter
Master Clear reset input – active low
Crystal oscillator input – external clock source input
Crystal oscillator output – in R/C mode, internally pulled to V
pull-up
Positive supply pin
Ground pin
16
15
20
19
18
17
14
13
12
11
RA1
RA0
OSC1
OSC2
V
V
RB7
RB6
RB5
RB4
dd
dd
- 5 -
RTCC
RA0
RA1
RA2
RA3
RB0
RB1
RB2
RB3
RB4
SX18AC/SX20AC/SX28AC/SX18AC75/SX20AC75/SX28AC75
V
Vss
n.c.
n.c.
dd
DIP/SOP
SX 28-PIN
9
10
11
12
13
14
1
2
3
4
5
6
7
8
Description
28
27
26
25
24
23
22
21
20
19
18
17
16
15
MCLR
OSC1
OSC2
RC7
RC6
RC5
RC4
RC3
RC2
RC1
RC0
RB7
RB6
RB5
RTCC
RA0
RA1
RA2
RA3
RB0
RB1
RB2
RB3
RB4
V
V
Vss
Vss
dd
dd
SX 28-PIN
9
10
11
12
13
14
1
2
3
4
5
6
7
8
dd
SSOP
www.scenix.com
through weak
28
27
26
25
24
23
22
21
20
19
18
17
16
15
MCLR
OSC1
OSC2
RC7
RC6
RC5
RC4
RC3
RC2
RC1
RC0
RB7
RB6
RB5