sx18ac ETC-unknow, sx18ac Datasheet - Page 16
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sx18ac
Manufacturer Part Number
sx18ac
Description
Configurable Communications Controllers With Ee/flash Program Memory, In-system Programming Capability And On-chip Debug
Manufacturer
ETC-unknow
Datasheet
1.SX18AC.pdf
(52 pages)
- Current page: 16 of 52
- Download datasheet (544Kb)
SX18AC/SX20AC/SX28AC/SX18AC75/SX20AC75/SX28AC75
© 2000 Scenix Semiconductor, Inc. All rights reserved.
Function Registers
STATUS
RTCC
INDF
FSR
PC
RA
RB
RC
Figure 6-1. Data Memory Organization
00
10
1F
07
0F
each bank
128 bytes
Registers
(8 bytes)
(16 bytes
- 16 -
(8 bytes)
Bank 0
SRAM
Bank 0
SRAM
total)
Bank 1
Bank 2
Bank 3
Bank 4
30
3F
Bank 5
50
5F
Bank 6
70
7F
Bank 0 is always accessed for
the lower 16 addresses,
irrespective of the three high-
order bits of FSR.
90
Bank 7
9F
B0
BF
7
D0
DF
6
F0
FF
5 4
3
2
www.scenix.com
1
0
FSR
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