sc68c752b NXP Semiconductors, sc68c752b Datasheet - Page 6

• Manufacturer Part Number: sc68c752b
• Description: 5 V, 3.3 V And 2.5 V Dual Uart, 5 Mbit/s Max. , With 64-byte Fifos And Motorola Up Interface
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 2:
SC68C752B_3
Product data sheet
Symbol
R/W
n.c.
OPA, OPB
RESET
RIA, RIB
RTSA, RTSB
RXA, RXB
RXRDYA,
RXRDYB
TXA, TXB
TXRDYA,
TXRDYB
Pin description
Pin
LQFP48
15
12, 25, 29,
37
32, 9
36
41, 21
33, 22
5, 4
31, 18
7, 8
43, 6
…continued
HVQFN32
12
14, 20
22, 7
24
-
23, 16
4, 3
-
5, 6
-
Type
I
-
O
I
I
O
I
O
O
O
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
Rev. 03 — 29 November 2005
Description
A logic LOW on this pin will transfer the contents of the data bus (D[0:7])
from an external CPU to an internal register that is defined by address
bits A[0:2]. A logic HIGH on this pin will load the contents of an internal
register defined by address bits A[0:2] on the SC68C752B data bus
(D[0:7]) for access by an external CPU.
not connected
User defined outputs. This function is associated with individual
Channel A and Channel B. The state of these pins is defined by the user
through the software settings of MCR[3]. OPA/OPB is a logic 0 when
MCR[3] is set to a logic 1. OPA/OPB is a logic 1 when MCR[3] is set to a
logic 0. The output of these two pins is HIGH after reset.
Reset (active LOW). This pin will reset the internal registers and all the
outputs. The UART transmitter output and the receiver input will be
disabled during reset time. RESET is an active LOW input.
Ring Indicator (active LOW). These inputs are associated with
individual UART Channel A and Channel B. A logic 0 on these pins
indicates the modem has received a ringing signal from the telephone
line. A LOW-to-HIGH transition on these input pins generates a modem
status interrupt, if enabled. The state of these inputs is reflected in the
Modem Status Register (MSR).
Request to Send (active LOW). These outputs are associated with
individual UART Channel A and Channel B. A logic 0 on the RTS pin
indicates the transmitter has data ready and waiting to send. Writing a
logic 1 in the Modem Control Register MCR[1] will set this pin to a
logic 0, indicating data is available. After a reset these pins are set to a
logic 1. These pins only affect the transmit and receive operations when
Auto-RTS function is enabled via the Enhanced Feature Register
(EFR[6]) for hardware flow control operation.
Receive data input. These inputs are associated with individual serial
channel data to the SC68C752B. During the local Loopback mode,
these RX input pins are disabled and TX data is connected to the UART
RX input internally.
Receive Ready (active LOW). RXRDYA or RXRDYB goes LOW when
the trigger level has been reached or the FIFO has at least one
character. It goes HIGH when the RX FIFO is empty.
Transmit data A, B. These outputs are associated with individual serial
transmit channel data from the SC68C752B. During the local Loopback
mode, the TX output pin is disabled and TX data is internally connected
to the UART RX input.
Transmit Ready (active LOW). TXRDYA or TXRDYB go LOW when
there are at least a trigger level number of spaces available or when the
FIFO is empty. It goes HIGH when the FIFO is full or not empty.
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SC68C752B
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