sc68c752b NXP Semiconductors, sc68c752b Datasheet - Page 26

• Manufacturer Part Number: sc68c752b
• Description: 5 V, 3.3 V And 2.5 V Dual Uart, 5 Mbit/s Max. , With 64-byte Fifos And Motorola Up Interface
• Manufacturer: NXP Semiconductors

Philips Semiconductors
SC68C752B_3
Product data sheet
7.6 Modem Control Register (MCR)
Remark: The three error bits (parity, framing, break) may not be updated correctly in the
first read of the LSR when the input clock (XTAL1) is running faster than 36 MHz.
However, the second read is always correct. It is strongly recommended that when using
this device with a clock faster than 36 MHz, that the LSR be read twice and only the
second read be used for decision making. All other bits in the LSR are correct on all
reads.
The MCR controls the interface with the mode, data set, or peripheral device that is
emulating the modem.
Table 15:
[1]
Bit
7
6
5
4
3
2
1
0
MCR[7:5] can only be modified when EFR[4] is set, that is, EFR[4] is a write enable.
Symbol
MCR[7]
MCR[6]
MCR[5]
MCR[4]
MCR[3]
MCR[2]
MCR[1]
MCR[0]
Modem Control Register bits description
[1]
[1]
[1]
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
Rev. 03 — 29 November 2005
Description
Clock select.
TCR and TLR enable.
Xon Any.
Enable loopback.
OPA/OPB control.
FIFO Ready enable.
RTS
DTR
Table 15
logic 0 = divide-by-1 clock input
logic 1 = divide-by-4 clock input
logic 0 = no action.
logic 1 = enable access to the TCR and TLR registers
logic 0 = disable Xon Any function
logic 1 = enable Xon Any function
logic 0 = normal operating mode
logic 1 = Enable local Loopback mode (internal). In this mode the
MCR[3:0] signals are looped back into MSR[7:4] and the TX output is
looped back to the RX input internally.
logic 0 = forces OPA/OPB output to HIGH state
logic 1 = forces OPA/OPB output to LOW state. In Loopback mode,
controls MSR[7].
logic 0 = Disable the FIFO Rdy register
logic 1 = Enable the FIFO Rdy register. In Loopback mode, controls
MSR[6].
logic 0 = force RTS output to inactive (HIGH)
logic 1 = force RTS output to active (LOW). In Loopback mode, controls
MSR[4]. If Auto-RTS is enabled, the RTS output is controlled by
hardware flow control.
logic 0 = force DTR output to inactive (HIGH)
logic 1 = force DTR output to active (LOW). In Loopback mode, controls
MSR[5].
shows Modem Control Register bit settings.
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SC68C752B
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