mc908jl16 Freescale Semiconductor, Inc, mc908jl16 Datasheet - Page 188

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mc908jl16

Manufacturer Part Number
mc908jl16
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Development Support
When the host computer has completed downloading code into the MCU RAM, the host then sends a
RUN command, which executes an RTI, which sends control to the address on the stack pointer.
16.3.3 Baud Rate
The communication baud rate is dependant on oscillator frequency. The state of PTB3 also affects baud
rate if entry to monitor mode is by IRQ = V
pin is at logic zero upon entry into monitor mode, the divide by ratio is 512.
16.3.4 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
(See
The data transmit and receive rate can be anywhere from 4800 baud to 28.8k-baud. Transmit and receive
baud rates must be identical.
16.3.5 Echoing
As shown in
pin for error checking.
Any result of a command appears after the echo of the last byte of the command.
188
Figure 16-10
Figure
BREAK
SENT TO
MONITOR
Blank reset vector,
$A5
Monitor Mode
ECHO
START
IRQ = V
IRQ = V
BIT
Entry By:
and
16-12, the monitor ROM immediately echoes each received byte back to the PTB0
START
START
BIT
BIT
Figure
BIT 0
TST
DD
READ
BIT 0
BIT 0
Figure 16-11. Sample Monitor Waveforms
BIT 1
16-11.)
Table 16-3. Monitor Baud Rate Selection
BIT 1
BIT 1
Figure 16-10. Monitor Data Format
READ
Figure 16-12. Read Transaction
MC68HC908JL16 Data Sheet, Rev. 1.1
BIT 2
BIT 2
BIT 2
OSC1 Clock
4.9152 MHz
9.8304 MHz
4.9152 MHz
9.8304 MHz
4.9152 MHz
Frequency
TST
BIT 3
ADDR. HIGH
. When PTB3 is high, the divide by ratio is 1024. If the PTB3
BIT 3
BIT 3
BIT 4
BIT 4
BIT 4
ADDR. HIGH ADDR. LOW
BIT 5
BIT 5
BIT 5
PTB3
X
X
BIT 6
0
1
1
BIT 6
BIT 6
BIT 7
BIT 7
BIT 7
ADDR. LOW
STOP
BIT
STOP
STOP
Baud Rate
BIT
BIT
9600 bps
9600 bps
4800 bps
9600 bps
4800 bps
START
NEXT
BIT
START
START
NEXT
NEXT
BIT
BIT
RESULT
DATA
Freescale Semiconductor

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