mc9s08ac128 Freescale Semiconductor, Inc, mc9s08ac128 Datasheet - Page 27

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mc9s08ac128

Manufacturer Part Number
mc9s08ac128
Description
8-bit Hcs08 Central Processor Unit Cpu
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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3.10
This section describes ac timing characteristics for each peripheral system. For detailed information about how clocks for the
bus are generated, see
3.10.1
Freescale Semiconductor
1
2
3
4
5
Num
Typical values are based on characterization data at V
This is the shortest pulse that is guaranteed to be recognized as a reset pin request. Shorter pulses are not guaranteed to
override reset requests from internal sources.
When any reset is initiated, internal circuitry drives the reset pin low for about 34 bus cycles and then samples the level on
the reset pin about 38 bus cycles later to distinguish external reset requests from internal requests.
This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
Timing is shown with respect to 20% V
1
2
4
6
8
3
5
7
9
AC Characteristics
C
Control Timing
Bus frequency (t
Real-time interrupt internal oscillator period
External reset pulse width
(t
Reset low drive
Active background debug mode latch setup time
Active background debug mode latch hold time
IRQ pulse width
KBIPx pulse width
Port rise and fall time (load = 50 pF)
cyc
Asynchronous path
Synchronous path
Asynchronous path
Synchronous path
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
= 1/f
Chapter 10, “Internal Clock Generator
RESET PIN
Self_reset
3
cyc
)
Parameter
= 1/f
4
3
2
2
MC9S08AC128 MCU Series Data Sheet, Rev. 1
Bus
DD
2
)
and 80% V
Figure 3-10. Reset Timing
Preliminary — Subject to Change
Table 3-12. Control Timing
5
DD
DD
levels. Temperature range –40°C to 125°C.
= 5.0V, 25°C unless otherwise stated.
(S08ICGV4).”
Chapter 3 Electrical Characteristics and Timing Specifications
t
extrst
t
t
t
Symbol
Rise
ILIH,
ILIH,
t
t
t
MSSU
t
rstdrv
f
t
extrst
MSH
Bus
RTI
, t
t
t
IHIL
IHIL
Fall
t
1.5 x t
1.5 x t
34 x t
Self_reset
1.5 x
Min
700
100
100
dc
25
25
cyc
cyc
cyc
Typ
30
3
1
1300
Max
20
MHz
Unit
μs
ns
ns
ns
ns
ns
ns
ns
27

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