lpc2888fet180 NXP Semiconductors, lpc2888fet180 Datasheet - Page 19

• Manufacturer Part Number: lpc2888fet180
• Description: 16/32-bit Arm Microcontrollers; 8 Kb Cache, Up To 1 Mb Flash, Hi-speed Usb 2.0 Device, And Sdram Memory Interface
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2880_LPC2888_2
Preliminary data sheet
6.10.1 Features
6.11.1 Features
6.12.1 Features
6.11 Real-time clock
6.12 General purpose DMA controller
The Real-time clock is a set of counters for measuring time when system power is on, and
optionally when it is off. It uses little power in either mode.
The General Purpose DMA Controller (GPDMA) is an AMBA AHB compliant master
allowing selected LPC2880/2888 peripherals to have DMA support. Peripherals that can
be serviced by the GPDMA channels include the MCI/SD card interface, UART TX and/or
RX, the I
16-bit dual DACs, the Simple Analog In (SAI) interfaces for data from the I2S/DAI and
16-bit dual ADCs, and the LCD interface.
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Optionally resets chip (via Clock Generation Unit) if not periodically reloaded.
Optional interrupt via Event Router.
32-bit Prescaler and 32-bit Counter allow extended watchdog period.
Measures the passage of time to maintain a calendar and clock.
Ultra Low Power design to support battery powered systems.
Provides Seconds, Minutes, Hours, Day of Month, Month, Year, Day of Week, and Day
of Year.
Dedicated 32 kHz oscillator.
Dedicated power supply pin can be connected to a battery or to the main 1.8 V.
Eight DMA channels. Each channel can support a unidirectional transfer, or a pair of
channels can be used together to follow a linked list of buffer addresses and transfer
counts.
The GPDMA provides 16 peripheral DMA request lines. Most of these are connected
to the peripherals listed above; two can be used for external requests.
The GPDMA supports a subset of the flow control signals supported by ARM DMA
channels, specifically ‘single’ but not ‘burst’ operation.
Memory-to-memory, memory-to-peripheral, peripheral-to-memory, and
peripheral-to-peripheral transfers.
Scatter or gather DMA is supported through the use of linked lists. This means that
the source and destination areas do not have to occupy contiguous areas of memory.
Rotating channel priority. Each DMA channel has equal opportunity to perform
transfers.
The GPDMA is one of three AHB masters in the LPC2880/2888, the others being the
ARM7 processor and the USB interface.
Incrementing or non-incrementing addressing for source and destination.
Supports 8 bit, 16 bit, and 32 bit wide transactions.
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C-bus interface, the Simple Analog Out (SAO) front-ends to the I2S/DAO and
Rev. 02 — 21 November 2006
16/32-bit ARM microcontrollers with external memory interface
LPC2880; LPC2888
© NXP B.V. 2006. All rights reserved.
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