p87c591vfb NXP Semiconductors, p87c591vfb Datasheet - Page 129

• Manufacturer Part Number: p87c591vfb
• Description: Single-chip 8-bit Microcontroller With Can Controller
• Manufacturer: NXP Semiconductors

Philips Semiconductors
20.4
Figure 48 shows how the ADC is realized. The ADC has its
own analog ground (AV
pin (V
resistance-ladder. The ladder has 1023 equally spaced
taps, separated by a resistance of “R”. The first tap is
located 0.5 x R above AV
1.5 x R below V
1024 x R. This structure ensures that the DAC is
monotonic and results in a symmetrical quantization error
is shown in Figure 48.
For input voltages between 0 V and + 1/2 LSB, the 10-bit
result of an A/D conversion will be 00 0000 0000B =
0000H. For input voltages between (V
V
3FFFH. AV
0.2 V. AV
analog input voltage range is from 2 V to 4 V, the 10-bit
resolution can be obtained over this range if AV
The result can always can always be calculated from the
following formula:
Result = 1024
2000 Jul 26
handbook, full pagewidth
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Single-chip 8-bit microcontroller with CAN controller
, the result of a conversion will be 11 1111 1111B =
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10-Bit ADC Resolution and Analog Supply
) connected to each end of the DAC’s
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Total resistance
= 1023R
= 1024R
ref+
should be positive 0 V and AV
may be between V
ref+
--------------- -
AV
V
2
. This gives a total ladder resistance of
R
R
R/2
IN
ref+
R/
R/2
R
R
SS
) and a positive analog reference
SS
AV ref
AV SS
, and the last tap is located
Value 0000 0000 00
Value 1111 1111 11
DD
+0.2 V and AV
ref+
) - 3/2 LSB and
ref+
V ref
V in
. If the
Fig.51 ADC Realization.
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1023
1022
1021
= 4 V.
3
2
1
0
SS
DECODER
is output for voltages 0 V +
is output for voltages (V
COMPARATOR
-
129
20.5
The P8xC591 has two reduced power modes of operation:
the Idle mode and the Power-down mode. These modes
are entered by setting bits in the PCON Special Function
Register. When the P8xC591 enters the Idle mode, the
following functions are disabled:
CPU
Timer T2
PWM0, PWM1
ADC
In Idle mode, the following functions remain active:
Timer 0
Timer 1
Timer T3
SIO0 SIO1
External interrupts
When the P8xC591 enters the Power-down mode, the
oscillator is stopped. The Power-down mode is entered by
setting the PD bit in the PCON register. The PD bit can
only be set if the ‘WDE’ bit is 0.
APPROXIMATION
SUCCESSIVE
Power Reduction Modes
REGISTER
MSB
LSB
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1
2
3
LSB
2
LSB) to V
(halted)
(halted and reset)
(reset; outputs are high)
(may be enabled for operation in Idle
mode by setting bit AIDC (AUXR1.6).
APPROXIMATION
CONTROL LOGIC
SUCCESSIVE
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Preliminary Specification
MHI053
P8xC591
START
READY