p89lpc972fn NXP Semiconductors, p89lpc972fn Datasheet - Page 39

• Manufacturer Part Number: p89lpc972fn
• Description: 8-bit Microcontroller With Accelerated Two-clock 80c51 Core 2kb/4 Kb/8 Kb Wide-voltage Byte-erasable ?ash
• Manufacturer: NXP Semiconductors

NXP Semiconductors
P89LPC97X_1
Preliminary data sheet
Fig 14. Comparator input and output connections
(1) See
(P0.5) CMPREF
Section 7.25.1
7.25.1 Selectable internal reference voltage
7.25.2 Comparator interrupt
7.25.3 Comparators and power reduction modes
(P0.4) CIN1A
(P0.3) CIN1B
(P0.2) CIN2A
(P0.1) CIN2B
V
ref(cmp)
(1)
An internal reference voltage generator may be used to supply a default reference when a
single comparator input pin is used. The user may program one of eight different values
for the internal reference voltage using the Comparator Reference register (CMPREF).
Each of the two comparators may use a different reference voltage.
Each comparator has an interrupt flag contained in its configuration register. This flag is
set whenever the comparator output changes state. The flag may be polled by software or
may be used to generate an interrupt. The two comparators use one common interrupt
vector. If both comparators enable interrupts, after entering the interrupt service routine,
the user needs to read the flags to determine which comparator caused the interrupt.
Either or both comparators may remain enabled when Power-down or Idle mode is
activated, but both comparators are disabled automatically in Total Power-down mode.
If a comparator interrupt is enabled (except in Total Power-down mode), a change of the
comparator output state will generate an interrupt and wake-up the processor. If the
comparator output to a pin is enabled, the pin should be configured in the push-pull mode
in order to obtain fast switching times while in Power-down mode. The reason is that with
the oscillator stopped, the temporary strong pull-up that normally occurs during switching
on a quasi-bidirectional port pin does not take place.
Comparators consume power in Power-down and Idle modes, as well as in the normal
operating mode. This fact should be taken into account when system power consumption
is an issue. To minimize power consumption, the user can disable the comparators via
PCONA.5, or put the device in Total Power-down mode.
for more details.
CP1
CN1
CP2
CN2
comparator 1
comparator 2
Rev. 01 — 17 December 2009
8-bit microcontroller with accelerated two-clock 80C51 core
CO1
CO2
change detect
change detect
OE1
OE2
CMF1
CMF2
P89LPC970/971/972
CMP1 (P0.6)
CMP2 (P0.0)
002aac346
EC
© NXP B.V. 2009. All rights reserved.
interrupt
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