p89lpc972fn NXP Semiconductors, p89lpc972fn Datasheet - Page 27

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p89lpc972fn

Manufacturer Part Number
p89lpc972fn
Description
8-bit Microcontroller With Accelerated Two-clock 80c51 Core 2kb/4 Kb/8 Kb Wide-voltage Byte-erasable ?ash
Manufacturer
NXP Semiconductors
Datasheet

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P89LPC97X_1
Preliminary data sheet
7.17.1 Brownout detection
7.17 Power Management
Table 8.
The P89LPC970/971/972 support a variety of power management features.
Power-on detect and brownout detect are designed to prevent incorrect operation during
initial power-up and power loss or reduction during operation.
The P89LPC970/971/972 support three different power reduction modes: Idle mode,
Power-down mode, and total Power-down mode. In addition, individual on-chip
peripherals can be disabled to eliminate unnecessary dynamic power use in any
peripherals that are not required for the application.
Integrated PMU automatically adjusts internal regulators to minimize power consumption
during Idle mode, Power-down mode and total Power-down mode. In addition, the power
consumption can be further reduced in Normal or Idle mode through configuring
regulators mode according to the applications.
The brownout detect function determines if the power supply voltage drops below a
certain level. Enhanced brownout detection has 3 independent functions: BOD reset,
BOD interrupt and BOD flash.
These 3 functions are disabled in Power-down mode and Total Power-down mode. In
Normal or Idle mode, BOD reset and BOD Flash are always on and can not be disabled in
software. BOD interrupt may be enabled or disabled in software.
BOD reset and BOD interrupt, each has 6 levels. BOE0 to BOE2 (UCFG1[3:5]) are used
as trip point configuration bits of BOD reset. BOICFG0 to BOICFG2 in register BODCFG
are used as trip point configuration bits of BOD interrupt.
BOD reset voltage should be lower than BOD interrupt trip point. BOD flash is used for
flash programming/erase protection and has only 1 trip point at 2.4 V. Please refer to
P89LPC970/971/972 User manual for detail configurations.
If brownout detection works, the brownout condition occurs when V
brownout falling trip voltage and is negated when V
voltage.
For correct activation of brownout detect, the V
Please see
Peripherals
SPI
I2C
UART
SPI/I2C/UART Pin remap
Table 11 “Static characteristics”
Rev. 01 — 17 December 2009
Function
SPICLK
MOSI
MISO
SS
SDA
SCL
TXD
RXD
8-bit microcontroller with accelerated two-clock 80C51 core
Primary pin out
-
-
-
-
P1.3
P1.2
P1.0
P1.1
for specifications.
DD
P89LPC970/971/972
rise and fall times must be observed.
DD
rises above the brownout rising trip
Alternative pin out
P0.0
P1.7
P1.6
P1.4
-
-
-
-
DD
falls below the
© NXP B.V. 2009. All rights reserved.
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