pic24hj128gp510at-i-pt Microchip Technology Inc., pic24hj128gp510at-i-pt Datasheet - Page 167

• Manufacturer Part Number: pic24hj128gp510at-i-pt
• Description: High-performance, 16-bit Microcontrollers
• Manufacturer: Microchip Technology Inc.

17.0
The Inter-Integrated Circuit (I
complete hardware support for both Slave and Multi-
Master modes of the I
standard, with a 16-bit interface.
The PIC24HJXXXGPX06A/X08A/X10A devices have
up to two I
I2C2. Each I
pin is clock and the SDAx pin is data.
Each I
features:
• I
• I
• I
• I
• Serial clock synchronization for I
• I
17.1
The hardware fully implements all the master and slave
functions of the I
specifications, as well as 7 and 10-bit addressing.
The I
master on an I
The following types of I
• I
• I
• I
For details about the communication sequence in each
of these modes, please refer to the “PIC24H Family
Reference Manual”.
© 2009 Microchip Technology Inc.
Note:
operation.
master and slaves.
used as a handshake mechanism to suspend and
resume serial transfer (SCLREL control).
collision and will arbitrate accordingly.
2
2
2
2
2
2
2
2
C interface supporting both master and slave
C Slave mode supports 7 and 10-bit address.
C Master mode supports 7 and 10-bit address.
C Port allows bidirectional transfers between
C supports multi-master operation; detects bus
C slave operation with 7-bit address
C slave operation with 10-bit address
C master operation with 7 or 10-bit address
2
2
C module can operate either as a slave or a
C module ‘x’ (x = 1 or 2) offers the following key
INTER-INTEGRATED
CIRCUIT™ (I
Operating Modes
2
C interface modules, denoted as I2C1 and
This data sheet summarizes the features
of the PIC24HJXXXGPX06A/X08A/X10A
family of devices. However, it is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the “PIC24H
Family Reference Manual”, Section 19.
“Inter-Integrated
(DS70235), which is available from the
Microchip website (www.microchip.com).
2
C module has a 2-pin interface: the SCLx
2
C bus.
2
C Standard and Fast mode
2
C operation are supported:
2
2
C serial communication
C™)
PIC24HJXXXGPX06A/X08A/X10A
2
Circuit™
C) module provides
2
C port can be
(I
2
C™)”
Preliminary
17.2
I2CxCON and I2CxSTAT are control and status
registers, respectively. The I2CxCON register is
readable and writable. The lower six bits of I2CxSTAT
are read-only. The remaining bits of the I2CSTAT are
read/write.
I2CxRSR is the shift register used for shifting data,
whereas I2CxRCV is the buffer register to which data
bytes are written, or from which data bytes are read.
I2CxRCV is the receive buffer. I2CxTRN is the transmit
register to which bytes are written during a transmit
operation.
The I2CxADD register holds the slave address. A
status bit, ADD10, indicates 10-bit Address mode. The
I2CxBRG acts as the Baud Rate Generator (BRG)
reload value.
In receive operations, I2CxRSR and I2CxRCV together
form a double-buffered receiver. When I2CxRSR
receives a complete byte, it is transferred to I2CxRCV
and an interrupt pulse is generated.
I
2
C Registers
DS70592A-page 165