pic24hj128gp510at-i-pt Microchip Technology Inc., pic24hj128gp510at-i-pt Datasheet - Page 122

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pic24hj128gp510at-i-pt

Manufacturer Part Number
pic24hj128gp510at-i-pt
Description
High-performance, 16-bit Microcontrollers
Manufacturer
Microchip Technology Inc.
Datasheet
PIC24HJXXXGPX06A/X08A/X10A
REGISTER 8-5:
REGISTER 8-6:
DS70592A-page 120
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-10
bit 9-0
Note 1: If the channel is enabled (i.e., active), writes to this register may result in unpredictable behavior of the
Note 1: If the channel is enabled (i.e., active), writes to this register may result in unpredictable behavior of the
R/W-0
R/W-0
R/W-0
U-0
2: Number of DMA transfers = CNT<9:0> + 1.
DMA channel and should be avoided.
DMA channel and should be avoided.
PAD<15:0>: Peripheral Address Register bits
Unimplemented: Read as ‘0’
CNT<9:0>: DMA Transfer Count Register bits
R/W-0
R/W-0
R/W-0
U-0
DMAxPAD: DMA CHANNEL x PERIPHERAL ADDRESS REGISTER
DMAxCNT: DMA CHANNEL x TRANSFER COUNT REGISTER
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
R/W-0
U-0
Preliminary
CNT<7:0>
PAD<15:8>
PAD<7:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(2)
R/W-0
R/W-0
R/W-0
(2)
U-0
R/W-0
R/W-0
R/W-0
U-0
© 2009 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
(1)
CNT<9:8>
(1)
R/W-0
(2)
R/W-0
R/W-0
R/W-0
bit 8
bit 0
bit 8
bit 0

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