pic24hj128gp510at-i-pt Microchip Technology Inc., pic24hj128gp510at-i-pt Datasheet - Page 137

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pic24hj128gp510at-i-pt

Manufacturer Part Number
pic24hj128gp510at-i-pt
Description
High-performance, 16-bit Microcontrollers
Manufacturer
Microchip Technology Inc.
Datasheet
10.0
The PIC24HJXXXGPX06A/X08A/X10A devices pro-
vide the ability to manage power consumption by selec-
tively managing clocking to the CPU and the
peripherals. In general, a lower clock frequency and a
reduction in the number of circuits being clocked con-
stitutes
PIC24HJXXXGPX06A/X08A/X10A devices can man-
age power consumption in four different ways:
• Clock frequency
• Instruction-based Sleep and Idle modes
• Software-controlled Doze mode
• Selective peripheral control in software
Combinations of these methods can be used to selec-
tively tailor an application’s power consumption while
still maintaining critical application features, such as
timing-sensitive communications.
10.1
PIC24HJXXXGPX06A/X08A/X10A devices allow a
wide range of clock frequencies to be selected under
application control. If the system clock configuration is
not locked, users can choose low-power or high-preci-
sion oscillators by simply changing the NOSC bits
(OSCCON<10:8>). The process of changing a system
clock during operation, as well as limitations to the pro-
cess, are discussed in more detail in Section 9.0
“Oscillator Configuration”.
EXAMPLE 10-1:
© 2009 Microchip Technology Inc.
PWRSAV #SLEEP_MODE
PWRSAV #IDLE_MODE
Note:
POWER-SAVING FEATURES
Clock Frequency and Clock
Switching
This data sheet summarizes the features
of the PIC24HJXXXGPX06A/X08A/X10A
family of devices. However, it is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the “PIC24H
Family Reference Manual”, Section 9.
“Watchdog Timer and Power-Saving
Modes” (DS70236), which is available
from
(www.microchip.com).
lower
the
PWRSAV INSTRUCTION SYNTAX
; Put the device into SLEEP mode
; Put the device into IDLE mode
consumed
Microchip
PIC24HJXXXGPX06A/X08A/X10A
website
power.
Preliminary
10.2
PIC24HJXXXGPX06A/X08A/X10A devices have two
special power-saving modes that are entered through
the execution of a special PWRSAV instruction. Sleep
mode stops clock operation and halts all code execu-
tion. Idle mode halts the CPU and code execution, but
allows peripheral modules to continue operation. The
assembly syntax of the PWRSAV instruction is shown in
Example 10-1.
Sleep and Idle modes can be exited as a result of an
enabled interrupt, WDT time-out or a device Reset. When
the device exits these modes, it is said to “wake-up”.
10.2.1
Sleep mode has these features:
• The system clock source is shut down. If an
• The device current consumption is reduced to a
• The Fail-Safe Clock Monitor does not operate
• The LPRC clock continues to run in Sleep mode if
• The WDT, if enabled, is automatically cleared
• Some device features or peripherals may continue
The device will wake-up from Sleep mode on any of
these events:
• Any interrupt source that is individually enabled.
• Any form of device Reset.
• A WDT time-out.
On wake-up from Sleep, the processor restarts with the
same clock source that was active when Sleep mode
was entered.
on-chip oscillator is used, it is turned off.
minimum, provided that no I/O pin is sourcing
current.
during Sleep mode since the system clock source
is disabled.
the WDT is enabled.
prior to entering Sleep mode.
to operate in Sleep mode. This includes items such
as the input change notification on the I/O ports, or
peripherals that use an external clock input. Any
peripheral that requires the system clock source for
its operation is disabled in Sleep mode.
Note:
Instruction-Based Power-Saving
Modes
SLEEP MODE
SLEEP_MODE and IDLE_MODE are
constants defined in the assembler
include file for the selected device.
DS70592A-page 135

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