pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 260

• Manufacturer Part Number: pxf4333
• Description: Abm 3g Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

Register 71 USCTI/DSCTI
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Register SADRx.WSel = 0:
Bit
Bit
IntRate(13:0)
Refer to
for the calculation of IntRate and FracRate
Data Sheet
Note: Recommendation for changing the UTOPIA port number or scheduler rate
Note: Read access to bit field IntRate(13:0) is not supported and will return undefined
during operation:
Disable specific scheduler by read-modify-write operation to corresponding bit in
registers USCEN0/DSCEN0... USCEN7/DSCEN7.
Modify scheduler specific UTOPIA port number and rates via
"Scheduler Configuration Table Integer Transfer Registers" on Page
registers
Fractional Transfer Registers" on Page
Enable specific scheduler by read-modify-write operation to corresponding bit in
registers USCEN0/DSCEN0... USCEN7/DSCEN7.
values.
Section 4.2.2.2 “Programming the Scheduler Block Rates” on Page 106
15
unused(1:0)
7
Upstream/Downstream SCTI Transfer Registers
USCTI/DSCTI
14
Integer Rate
This value determines the integer part of the Scheduler Block output
rate.
6
Read/Write
0000
USCTI
Written by CPU to maintain the SCTI tables
H
13
5
and
A1
H
12
Table 9 "Scheduler Configuration Table
IntRate(7:0)
4
260
267, registers USCTFT/DSCTFT.
IntRate(13:8)
DSCTI
11
3
10
2
B9
Register Description
H
PXF 4333 V1.1
9
1
2001-12-17
ABM-3G
Table 8
8
0
257,