pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 214

• Manufacturer Part Number: pxf4333
• Description: Abm 3g Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

Register 38 QCT1
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Bit
Bit
DQac
RSall
Data Sheet
QIDvalid
DQac
15
7
Queue Configuration Transfer Register 1
RSall
14
Dummy Queue Action
This bit is a command bit that must always be set when a dummy
queue is activated or deactivated.
Note: Read access to this command bit will always return ’0’.
ReSchedule Always
This bit determines the queue scheduling process:
’0’
6
Read/Write
0000
QCT1
Written and Read by CPU to maintain the LCI table
H
13
0
5
The queue is only scheduled/re-scheduled with its
specific rate while the queue is not empty (normal
operation).
43
H
12
0
4
214
SBID(6:0)
11
3
10
2
TCID(3:0)
Register Description
PXF 4333 V1.1
9
1
2001-12-17
ABM-3G
8
0