zl2103 Intersil Corporation, zl2103 Datasheet - Page 19

• Manufacturer Part Number: zl2103
• Description: 3a Digital-dc Synchronous Step-down Dc/dc Converter
• Manufacturer: Intersil Corporation

Without capacitive filtering near the power supply circuit, this
current would flow through the supply bus and return planes,
coupling noise into other system circuitry. The input capacitors
should be rated at 1.2X the ripple current calculated in Equation
10 to avoid overheating of the capacitors due to the high ripple
current, which can cause premature failure. Ceramic capacitors
with X7R or X5R dielectric with low ESR and 1.1X the maximum
expected input voltage are recommended.
BOOTSTRAP CAPACITOR SELECTION
The high-side driver boost circuit utilizes an internal Schottky
diode (D
sufficient gate drive for the high-side MOSFET driver. C
be a 47nF ceramic type rated for at least 10V.
C
This capacitor is used to both stabilize and provide noise filtering
for the 2.5V internal power supply. It should be between 4.7µF
and 10µF, should use a semi-stable X5R or X7R dielectric
ceramic with a low ESR (less than 10mΩ) and should have a
rating of 4V or more.
C
This capacitor is used to both stabilize and provide noise filtering
for the 7V reference supply. It should be between 4.7µF and
10µF, should use a semi-stable X5R or X7R dielectric ceramic
capacitor with a low ESR (less than 10mΩ) and should have a
rating of 10V or more. Because the current for the bootstrap
supply is drawn from this capacitor, C
10X the value of C
voltage on it to droop excessively during a C
C
This capacitor is used to both stabilize and provide noise filtering
for the analog 5V reference supply. It should be between 2.2µF
and 10µF, should use a semi-stable X5R or X7R dielectric
ceramic capacitor with a low ESR (less than 10mΩ) and should
have a rating of 6.3V or more.
THERMAL CONSIDERATIONS
In typical applications, the ZL2103’s high efficiency will limit the
internal power dissipation inside the package. However, in
applications that require a high ambient operating temperature
the user must perform some thermal analysis to ensure that the
ZL2103’s maximum junction temperature is not exceeded.
The ZL2103 has a maximum junction temperature limit of
+125°C, and the internal over-temperature limiting circuitry will
force the device to shut down if its junction temperature exceeds
this threshold. In order to calculate the maximum junction
temperature, the user must first calculate the power dissipated
inside the IC (P
The maximum operating junction temperature can then be
calculated using Equation 12:
Where T
temperature and θ
for the ZL2103 package.
T
P
V2P5
VR
VRA
Q
j
max
=
SELECTION
(
SELECTION
I
SELECTION
=
LOAD
PCB
B
) and an external bootstrap capacitor (C
T
PCB
is the expected maximum printed circuit board
2
)
[
Q
(
+
R
) as expressed in Equation 11:
DS
(
B
JC
P
so that a discharged C
(
Q
ON
is the junction-to-case thermal resistance
×
)
QH
θ
JC
)
( )
D
)
19
+
(
R
DS
VR
(
ON
should be sized at least
)
B
QL
B
does not cause the
)
recharge pulse.
(
1
−
B
D
) to supply
)
]
B
should
(EQ. 11)
(EQ. 12)
ZL2103
Current Sensing and Current Limit Threshold
Selection
The ZL2103 incorporates a patented “lossless” current sensing
method across the internal low-side MOSFET that is independent
of r
the gain, which does not represent a r
of the internal current sensing circuit can be modified by the
IOUT_CAL_GAIN and IOUT_CAL_OFFSET commands.
The design should include a current limiting mechanism to
protect the power supply from damage and prevent excessive
current from being drawn from the input supply in the event that
the output is shorted to ground or an overload condition is
imposed on the output. Current limiting is accomplished by
sensing the current through the circuit during a portion of the
duty cycle. The current limit threshold is set to 4.5A by default.
The current limit threshold can set to a custom value via the
I
for further details.
Additionally, the ZL2103 gives the power supply designer several
choices for the fault response during over or under current
conditions. The user can select the number of violations allowed
before declaring a fault, a blanking time and the action taken when
a fault is detected. The blanking time represents the time when no
current measurement is taken. This is to avoid taking a reading just
after a current load step (less accurate due to potential ringing).
Please refer to Application note
Loop Compensation
The ZL2103 operates as a voltage-mode synchronous buck
controller with a fixed frequency PWM scheme. Although the
ZL2103 uses a digital control loop, it operates much like a
traditional analog PWM controller. Figure 16 is a simplified block
diagram of the ZL2103 control loop, which differs from an analog
control loop only by the constants in the PWM and compensation
blocks. As in the analog controller case, the compensation block
compares the output voltage to the desired voltage reference and
compensation zeroes are added to keep the loop stable. The
resulting integrated error signal is used to drive the PWM logic,
converting the error signal to a duty cycle to drive the internal
MOSFETs.
2
C/SMBus interface. Please refer to Application Note
DS(ON)
variations, including temperature. The default value for
FIGURE 16. CONTROL LOOP BLOCK DIAGRAM
DPWM
1-D
D
Compensation
V
AN2033
IN
L
DS(ON)
R
C
for further details.
C
R
value, and the offset
O
V
AN2033
OUT
May 3, 2011
FN6966.5