zl2103 Intersil Corporation, zl2103 Datasheet - Page 17

• Manufacturer Part Number: zl2103
• Description: 3a Digital-dc Synchronous Step-down Dc/dc Converter
• Manufacturer: Intersil Corporation

In the event of a loss of the external clock signal, the output
voltage may show transient over/undershoot. If this happens, the
ZL2103 will automatically switch to its internal oscillator and
switch at a frequency close to the previous incoming frequency.
CONFIGURATION C: SYNC AUTO DETECT
When the SYNC pin is configured in auto detect mode (CFG pin is
left OPEN), the device will automatically check for a clock signal
on the SYNC pin after enable is asserted. If a valid clock signal is
present, the ZL2103’s oscillator will then synchronize with the
rising edge of the external clock (refer to SYNC INPUT
description).
If no incoming clock signal is present, the ZL2103 will configure
the switching frequency according to the state of the SYNC pin as
listed in Table 8. In this mode, the ZL2103 will only read the
SYNC pin connection during the start-up sequence. Changes to
the SYNC pin connection will not affect f
(VDDS) is cycled off and on again.
If the user wishes to run the ZL2103 at a frequency not listed in
Table 8, the switching frequency can be set using an external
resistor, R
Table 9.
SYNC
SYNC PIN
Resistor
TABLE 8. SWITCHING FREQUENCY SELECTION
OPEN
HIGH
LOW
R
12.1
13.3
14.7
16.2
19.6
21.5
23.7
26.1
28.7
31.6
34.8
38.3
42.2
46.4
, connected between SYNC and SGND using
(kΩ)
17.8
SYNC
10
11
TABLE 9. R
SYNC
17
RESISTOR VALUES
SW
FREQUENCY
See Table 9
until the power
200kHz
400kHz
1MHz
1000
(kHz)
F
200
222
242
267
296
320
364
400
421
471
533
571
615
667
727
889
SW
ZL2103
The switching frequency can also be set to any value between
200kHz and 1MHz using the I
frequencies are defined by
f
Application Note
If a value other than f
command, the internal circuitry will select the valid switching
frequency value that is closest to the entered value. For example,
if 810kHz is entered, the device will select 800kHz (N=10).
Note: The switching frequency read back using the appropriate
PMBus command will differ slightly from the selected value in
Table 9. The difference is due to hardware quantization.
When multiple Zilker Labs devices are used together, connecting
the SYNC pins together will force all devices to synchronize with
each other. The CFG pin of one device must set its SYNC pin as an
output and the remaining devices must have their SYNC pins set
as an input or as auto detect.
Note: Precise ramp timing mode must be disabled to use SYNC
clock auto detect.
Component Selection
The ZL2103 is a synchronous buck converter with integrated
MOSFETs that uses an external inductor and capacitors to
perform the power conversion process. The proper selection of
the external components is critical for optimized performance.
To select the appropriate external components for the desired
performance goals, the power supply requirements listed in
Table 10 must be defined.
DESIGN GOAL TRADE-OFFS
The design of the buck power stage requires several
compromises among size, efficiency and cost. The inductor core
loss increases with frequency, so there is a trade-off between a
Input voltage (V
Output voltage (V
Output current (I
Output voltage ripple (V
Output load step (I
Output load step rate
Output deviation due to load step
Maximum PCB temp.
Desired efficiency
Other considerations
SW
= 8MHz/N, where whole number N is 8 ≤ N ≤ 40. See
PARAMETER
TABLE 10. POWER SUPPLY REQUIREMENTS
IN
OUT
OUT
)
ostep
AN2033
)
)
)
orip
SW
)
= 8MHz/N is entered using a PMBus
for details.
2
C/SMBus interface. The available
0A to 3A
+120°C
< 3% of
RANGE
4.5V to
0.6V to
14.0V
5.0V
V
< I
OUT
-
-
-
-
o
Optimize for small
±1% of V
±3% of V
±25% of I
EXAMPLE
2.5A/µs
+85°C
VALUE
3.3V
85%
12V
size
2A
May 3, 2011
FN6966.5
OUT
OUT
o