zl2106 Intersil Corporation, zl2106 Datasheet - Page 23

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zl2106

Manufacturer Part Number
zl2106
Description
6a Digital-dc Synchronous Step-down Dc-dc Converter
Manufacturer
Intersil Corporation
Datasheet

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6.10 Loop Compensation
The ZL2106 operates as a voltage-mode synchronous
buck controller with a fixed frequency PWM scheme.
Although the ZL2106 uses a digital control loop, it
operates much like a traditional analog PWM
controller. Figure 16 is a simplified block diagram of
the ZL2106 control loop, which differs from an analog
control loop only by the constants in the PWM and
compensation blocks. As in the analog controller case,
the compensation block compares the output voltage to
the desired voltage reference and compensation zeroes
are added to keep the loop stable. The resulting
integrated error signal is used to drive the PWM logic,
converting the error signal to a duty cycle to drive the
internal MOSFETs.
In the ZL2106, the compensation zeros are set by
configuring the FC pin or via the I
once the user has calculated the required settings. This
method eliminates the inaccuracies due to the
component tolerances associated with using external
resistors and capacitors required with traditional analog
controllers. Utilizing the loop compensation settings
Table 16. Resistor Settings for Loop Compensation
f
f
sw
sw
/120 < f
/60 < f
f
sw
f
/240 < f
f
Figure 16. Control Loop Block Diagram
n
sw
Range
/120
n
n
< f
< f
sw
n
sw
<
/30
/60
23
f
f
f
f
f
f
sw
sw
sw
sw
sw
sw
/10 > f
/30 > f
/10 > f
/30 > f
/10 > f
/30 > f
f
f
f
f
zesr
zesr
zesr
zesr
> f
> f
> f
Range
zesr
zesr
zesr
zesr
zesr
zesr
sw
sw
sw
> f
> f
> f
> f
> f
> f
2
/10
/10
/10
C/SMBus interface
sw
sw
sw
sw
sw
sw
/30
/60
/30
/60
/30
/60
12.1 kΩ
13.3 kΩ
14.7 kΩ
16.2 kΩ
17.8 kΩ
19.6 kΩ
21.5 kΩ
10 kΩ
11 kΩ
R
FC
ZL2106
shown in Table 16 will yield a conservative crossover
frequency at a fixed fraction of the switching
frequency (f
Step 1:
Step 2:
Step 3:
The loop compensation coefficients can also be set via
the I
Note AN33 for further details. Also refer to
Application Note AN35 for further technical details on
setting loop compensation.
6.11 Driver Dead-time Control
The ZL2106 utilizes a predetermined fixed dead-time
applied between the gate drive signals for the top and
bottom MOSFETs.
In a synchronous buck converter, the MOSFET drive
circuitry must be operated such that the top and bottom
MOSFETs are never in the conducting state at the
same time. This is because potentially damaging
currents flow in the circuit if both MOSFETs are on
simultaneously for periods of time exceeding a few
nanoseconds. Conversely, long periods of time in
which both MOSFETs are off reduces overall circuit
efficiency by allowing current to flow in their parasitic
body diodes.
Therefore, it is advantageous to minimize the dead-
time to provide peak optimal efficiency without
compromising system reliability. The ZL2106 has
optimized the dead-time for the integrated MOSFETs
to maximizing efficiency.
2
C/SMBus interface. Please refer to Application
Using the following equation, calculate the
resonant frequency of the LC filter, f
Calculate the ESR zero frequency (f
Based
appropriate resistor, R
SW
/20) and 60° of phase margin.
on
f
f
n
zesr
=
Table
2
Data Sheet Revision 2/19/2009
=
π
2
πCRc
1
L
1
×
FC
16,
C
.
www.intersil.com
determine
zesr
n
.
).
the

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