zl2106 Intersil Corporation, zl2106 Datasheet - Page 15

• Manufacturer Part Number: zl2106
• Description: 6a Digital-dc Synchronous Step-down Dc-dc Converter
• Manufacturer: Intersil Corporation

6. Power Conversion Functional Description
6.1 Internal Bias Regulators and Input Supply
The ZL2106 employs three internal low dropout
(LDO) regulators to supply bias voltages for internal
circuitry, allowing it to operate from a single input
supply. The internal bias regulators are as follows:
VR:
VRA: The VRA LDO provides a regulated 5 V bias
V2P5: The V2P5 LDO provides a regulated 2.5 V bias
When the input supply (VDDS) is higher than 7.5 V,
the VR and VRA pins should not be connected to any
other pins. These pins should only have a filter
capacitor attached. Due to the dropout voltage
associated with the VR and VRA bias regulators, the
VDDS pin must be connected to these pins for designs
operating from a supply below 7.5 V. Figure 13
illustrates the required connections for all cases.
Note: The internal bias regulators, VR and VRA, are
not designed to be outputs for powering other circuitry.
Do not attach external loads to any of these pins. Only
the multi-mode pins may be connected to the V2P5 pin
for logic HIGH settings.
Connections
The VR LDO provides a regulated 7 V bias
supply for the high-side MOSFET driver
circuit. It is powered from the VDDS pin and
supplies bias current internally. A 4.7 µF filter
capacitor is required at the VR pin. The VDDS
pin directly supplies the low-side MOSFET
driver circuit.
supply for the current sense circuit and other
analog circuitry. It is powered from the VDDS
pin and supplies bias current internally. A 4.7
µF filter capacitor is required at the VRA pin.
supply for the main controller circuitry. It is
powered from the VRA LDO and supplies bias
current internally. A 10 µF filter capacitor is
required at the V2P5 pin.
Figure 13. Input Supply Connections
4.5V ≤ V
VDDS
VRA
VR
IN
≤ 5.5V
V
IN
15
5.5V < V
VDDS
VRA
VR
IN
≤ 7.5V
V
IN
7.5V < V
VDDS
VRA
VR
IN
≤ 14V
V
IN
ZL2106
6.2 High-side Driver Boost Circuit
The gate drive voltage for the high-side MOSFET
driver is generated by a floating bootstrap capacitor, C
(see Figure 9). When the lower MOSFET (QL) is
turned on, the SW node is pulled to ground and the
capacitor is charged from the internal VR bias
regulator through diode D
upper MOSFET (QH) turns on, the SW node is pulled
up to VDDP and the voltage on the bootstrap capacitor
is boosted approximately 6.5 V above VDDP to
provide the necessary voltage to power the high-side
driver. An internal Schottky diode is used with C
help maximize the high-side drive supply voltage.
6.3 Output Voltage Selection
The output voltage may be set to any voltage between
0.6 V and 5.0 V provided that the input voltage is
higher than the desired output voltage by an amount
sufficient to prevent the device from exceeding its
maximum duty cycle specification. Using the pin-strap
method, V
voltages as shown in Table 6.
Table 6. Pin-strap Output Voltage Settings
OUT
OPEN
VSET
HIGH
LOW
can be set to one of three standard
Data Sheet Revision 2/19/2009
B
. When QL turns off and the
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1.2 V
1.5 V
3.3 V
V
OUT
B
to
B