W83977AF Information Storage Devices, Inc, W83977AF Datasheet - Page 89

• Manufacturer Part Number: W83977AF
• Description: W83877TF Plus Kbc, Cir, RTC
• Manufacturer: Information Storage Devices, Inc

Bit 3:
Bit 2~0:
4.9.8 Set7.Reg7 - Infrared Module Control Register (IRM_CR)
Bit 7:
Bit 6:
Bit 5:
Table: IR receiver input pin selection
Note: that (1) AUX_RX is defined in Set5.Reg4.Bit4, (2) high speed IR includes MIR (1.152M or 0.576M bps) and FIR (4M bps), (3)
Bit 4:
Bit 3:
Bit 2~0:
Default Value
IRM_CR
Reg.
IRRX is the input of the low speed or high speed IR receiver, IRRXH is the input of the high speed IR receiver.
IRSL0D
0
0
0
0
1
1
1
1
Reserved, write 0.
HRC_SL2~0 - High Speed Remote IR Mode Select.
These bits setup the operational mode of high speed remote IR front-end module when
AM_FMT=1 and .AD_MD2~0 are configured to Remote IR mode. These values will be
automatically loaded to IR_SL2~0, respectively.
AM_FMT - Automatic Format
A write to 1 will enable automatic format IR front-end module. These bit will affect the
output of IR_SL2~0 which is referred by IR front-end module selection (Set7.Reg4~6)
IRX_MSL - IR Receiver Module Select
Select the receiver input path from the IR front end module if IR module has the
separated high speed and low speed receiver path. If the IR module has only one
receiving path, then this bit should be set to 0.
IRSL0D - Direction of IRSL0 Pin
Select function for IRRXH or IRSL0 because they share common pin and have different
input/output direction.
RXINV - Receiving Signal Invert
TXINV - Transmitting Signal Invert
Reserved, write 0.
A write to 1 will Invert the receiving signal.
A write to 1 will Invert the transmitting signal.
AM_FMT IRX_MSL IRSL0D
Bit 7
0
IRX_MSL
IRX_MSL
IRSL0_D
Bit 6
0
0
1
1
0
0
1
1
0
0
1
0
1
Bit 5
0
- 77 -
AUX_RX
RXINV
Bit 4
X
X
X
X
0
1
0
1
0
IRRX (Low/High Speed)
Receiver Pin selected
W83977F/ W83977AF
TXINV
IRRXH (High Speed)
Bit 3
Publication Release Date: March 1998
0
High Speed IR
IRSL0 (O/P)
IRRXH (I/P)
Function
X
X
0
1
X
X
0
1
Bit 2
0
-
PRELIMINARY
Bit 1
Selected IR Pin
0
-
Revision 0.58
Reserved
Reserved
IRRXH
IRRXH
IRRX
IRRX
IRRX
IRRX
Bit 0
0
-