W83977AF Information Storage Devices, Inc, W83977AF Datasheet - Page 100

• Manufacturer Part Number: W83977AF
• Description: W83877TF Plus Kbc, Cir, RTC
• Manufacturer: Information Storage Devices, Inc

Bit 5-3: Reflect the IRQ resource assigned for ECP port.
Bit 2-0: These five bits are at high level during a read and can be written
5.3.10 ecr (Extended Control Register) Mode = all
This register controls the extended ECP parallel port functions. The bit definitions are follows:
Bit 7-5: These bits are read/write and select the mode.
cnfgB[5:3]
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
Standard Parallel Port mode. The FIFO is reset in this mode.
PS/2 Parallel Port mode. This is the same as 000 except that direction may be
used to tri-state the data lines and reading the data register returns the value on the
data lines and not the value in the data register.
Parallel Port FIFO mode. This is the same as 000 except that bytes are written or
DMAed to the FIFO. FIFO data are automatically transmitted using the standard
parallel port protocol. This mode is useful only when direction is 0.
ECP Parallel Port Mode. When the direction is 0 (forward direction), bytes placed
into the ecpDFifo and bytes written to the ecpAFifo are placed in a single FIFO and
auto transmitted to the peripheral using ECP Protocol. When the direction is 1
(reverse direction), bytes are moved from the ECP parallel port and packed into
bytes in the ecpDFifo.
Selects EPP Mode. In this mode, EPP is activated if the EPP mode is selected.
Reserved.
Test Mode. The FIFO may be written and read in this mode, but the data will not be
transmitted on the parallel port.
Configuration Mode. The confgA and confgB registers are accessible at 0x400 and
0x401 in this mode.
reflect other IRQ resources selected by PnP register (default)
IRQ7
IRQ9
IRQ10
IRQ11
IRQ14
IRQ15
IRQ5
7
6
IRQ resource
5
4
3
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2
1
W83977F/ W83977AF
0
Publication Release Date: January 1997
empty
full
service Intr
dmaEn
nErrIntrEn
MODE
MODE
MODE
.
PRELIMINARY
Revision 0.50