r2j20652anp Renesas Electronics Corporation., r2j20652anp Datasheet - Page 13
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r2j20652anp
Manufacturer Part Number
r2j20652anp
Description
Integrated Driver ? Mos Fet Drmos
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R2J20652ANP.pdf
(17 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R2J20652ANP
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
R2J20652ANP
PWM & LSDBL#
The PWM pin is the signal input pin for the driver chip. When the PWM input is high, the gate of the high-side MOS
FET (GH) is high and the gate of the low-side MOS FET (GL) is low.
The LSDBL# pin is the Low Side Gate Disable pin for "Discontinuous Conduction Mode (DCM)" when LSDBL# is
low.
Figure 2 shows the Typical high-side and low-side gate switching and Inductor current (IL) during "Continuous
Conduction Mode (CCM)" and low-side gate disabled when asserting LSDBL# signal.
This pin is internally pulled up to Reg5V with 150 k resistor.
When low-side disable function is not used, keep this pin open or pulled up to VCIN.
REJ03G1867-0300 Rev.3.00 Feb 26, 2010
Page 13 of 16
PWM
H
L
CCM Operation (LSDBL# = "H" or Open mode)
IL
GH
GL
DCM Operation (LSDBL# = "L")
IL
GH
GL
0 A
GH
H
L
GL
H
L
Figure 2.1 Typical Signals during CCM
Figure 2.2 Typical Signals during DCM
Preliminary