lx1660 Microsemi Corporation, lx1660 Datasheet - Page 7

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lx1660

Manufacturer Part Number
lx1660
Description
Advanced Pwm Controller
Manufacturer
Microsemi Corporation
Datasheet
Copyright © 1998
Rev. 1.1
ERROR VOLTAGE COMPARATOR
The error voltage comparator compares the feedback voltage at
the positive side of the sense resistor to the set voltage (set voltage
plus 40mV in LX1661). An external filter is recommended for high-
frequency noise.
CURRENT LIMIT AND HICCUP SECTIONS
Current limiting is performed by sensing the inductor current
across the sense resistor. Exceeding this threshold turns the
output drive OFF and latches it OFF until the PWM latch set input
goes high again. To reduce stress on the external MOSFET and
SCR during output shorts or heavy-load conditions, a hiccup
circuit is incorporated, which provides 10% duty cycle. The
hiccup time is programmed via a capacitor at the HICCUP pin. A
low voltage at this pin disables the hiccup function.
OFF TIME CONTROL TIMING SECTION
The timing capacitor C
timing capacitor is quickly charged during the ON time of the top
MOSFET and allowed to discharge when the top MOSFET is OFF.
Notes 1. The number of capacitors within this bank may be reduced for cost savings at a penalty of increased ripple on the input bus.
7/98
2. The number of capacitors in the output filter bank may be reduced by two in a typical application; more may be removed for systems
3. If pulse-by-pulse current limiting is desired, remove C7 and short LX1660 pin 7 to ground.
4. D1 is Motorola MBR1035 for 10A capability; downsize as per required current.
with lesser transient requirements.
V
Figure 4 — LX1660 Controller Used In A Typical Stand-Alone High-Current 5V To 3.3V Regulator Application
R14
1.3k (See Table 5)
R15
2.0k
OUT
= V
(V
R16
10k
C3
0.1µF
REF
REF
* (1 + R14/R15)
R3, 1k
= 2.0V)
T
allows programming of the OFF-time. The
See Note 3
C7
0.1µF
R4
1k
C4
390pF
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
C8
680pF
T H E O R Y O F O P E R A T I O N
P
A
A P P L I C A T I O N I N F O R M A T I O N
1
2
3
4
5
6
7
8
R O D U C T I O N
D V A N C E D
EN
OT
SGND
V
INV
NINV
HICCUP
C
REF
T
ADJ
16-pin SOIC
LX1660
SYNCEN
PGND
BDRV
TDRV
P W M C
CS+
CS-
V
V
CC
C1
16
15
14
13
12
11
10
9
12V
D
OFF TIME CONTROL TIMING SECTION
In order to minimize frequency variations while providing
different supply voltages, the discharge current is modulated by
the voltage at the OT
tional to the OT
the IC shuts down into a low quiescent current mode.
UNDER VOLTAGE LOCKOUT AND SHUTDOWN SECTION
The purpose of the UVLO is to keep the output drive off and to
maintain low quiescent current until the input voltage reaches the
start-up threshold. At voltages below the start-up voltage, the
UVLO comparator disables the internal biasing, and turns off the
output drives. The NINV pin is pulled low.
SYNCHRONOUS CONTROL SECTION
The synchronous control section incorporates a unique break-
before-make function to ensure that the primary switch and the
synchronous switch are not turned on at the same time. Approxi-
mately 100 nanoseconds of deadtime is provided by the break-
before-make circuitry to protect the MOSFET switches.
A T A
O N T R O L L E R
C9
1µF
IRL3103
S
Q1
H E E T
C1
390pF
(continued)
ADJ
5µH Toroid
D1
See Note 4
See Note 1
voltage. If the OT
R5, 1k
R6, 1k
L1
C2 x 3
6.3V, 1500µF
Sanyo MV-GX
or equivalent
ADJ
pin. The OFF-time is inversely propor-
R1, 5m
LX1660/1661
is optional
ADJ
Fuse (F1)
F1
voltage drops below 0.7V,
(continued)
Sanyo MV-GX or
See Note 2
6.3V, 1500µF
equivalent
V
C5 x 6
OUT
V
IN
3.3V
5V
7

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