lx1660 Microsemi Corporation, lx1660 Datasheet - Page 6

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lx1660

Manufacturer Part Number
lx1660
Description
Advanced Pwm Controller
Manufacturer
Microsemi Corporation
Datasheet
LX1660/1661
6
IC OPERATION
Referring to the block diagram and typical application circuit, the
output turns ON the top MOSFET, allowing the inductor current
to increase. At the error comparator threshold, the PWM latch is
reset, the top MOSFET turns OFF and the synchronous MOSFET
turns ON. The OFF-time capacitor C
At the valley voltage, the synchronous MOSFET turns OFF and the
top MOSFET turns on.
prevents simultaneous conduction of the two MOSFETs.
the OFF-time is modulated as a function of the voltage at the OT
pin. The OT
of 0.7V. Below 0.7V the controller will shut down. A low voltage
at the EN pin or the OT
mode. During the sleep mode the NINV pin is pulled low. This
discharges the external bypass capacitor on this pin and allows for
a soft-start.
Regulation
LX1660 Only: The INV pin is connected to the negative side
of the sense resistor (i.e. the actual voltage supplied to the
load) — See Figure 2. The LX1660 will achieve a high DC set-
point accuracy, since it regulates at the load, but it will have
greater transient voltage over- and under-shoots than the LX1661.
LX1661 Only: The INV pin is connected to the positive side of
the sense resistor (between the inductor and the sense resistor)
— See Figure 2. The LX1661 has a 40mV offset to the NINV pin
to enhance transient response, as shown in Figure 3 below.
To minimize frequency variation with varying output voltage,
of capacitors, V = I * ESR
Steady-state output voltage
to current change and ESR
Voltage drop (mainly) due
ADJ
above nominal set-point
pin is also being monitored for a minimum voltage
(Effects of ESL ignored
at low current ~40mV
Nominal set-point
in this analysis)
voltage, V
ADJ
A special break-before-make circuit
pin will put the controller in a sleep
SET
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
T
is now allowed to discharge.
P
A
R O D U C T I O N
Figure 3 — Adaptive Voltage Positioning
D V A N C E D
T H E O R Y O F O P E R AT I O N
P W M C
ADJ
D
changes allows a greater output voltage excursion during a fast
step-load transient and requires fewer output capacitors to meet
the transient-response specification.
ENABLE
V
C
A T A
CONTROL
HICCUP
O N T R O L L E R
This adaptive positioning of the output voltage as the load
V
Figure 2 — LX1660 / 1661 General Circuit Configuration
FB
The peak voltage at the V
voltage and its average is the peak voltage minus the ripple volt-
age at V
The output voltage is the voltage at the V
drop across the current sensing resistor (I * R
At light loads, the voltage drop across the sensing resistor is small;
hence, the output voltage is approximately the voltage at the V
pin (approximately 40mV higher than the nominal set-point volt-
age, V
At heavy loads, larger current flows in the sense resistor, there-
fore, the voltage drop is higher and the output voltage is lower.
C
T
S
EN
INV
NINV
HICCUP
C
SET
T
CS-
H E E T
FB
).
R
pin.
To R
+V
C
CC
S
BDRV
TDRV
CS+
V
REF
R
C
A
B
Q
Q
2V
1
2
Load current
Output voltage
(V
Steady-state voltage at
high current is approximately
V
FB
SET
+V
OUT
pin is 40mV higher than the set
+ 40mV - I * R
)
L
C
(LX1661)
CS+
V
FB
FB
SENSE
pin minus the voltage
R
S
SENSE
CS-
).
(LX1660)
Copyright © 1998
V
FB
Rev. 1.1
C
OUT
FB
LOAD
7/98

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