uba20271 NXP Semiconductors, uba20271 Datasheet - Page 15

• Manufacturer Part Number: uba20271
• Description: 350 V And 600 V Power Ics For Dimmable Compact Fluorescent Lamps
• Manufacturer: NXP Semiconductors

NXP Semiconductors
UBA20271_UBA20272
Product data sheet
7.4.2 OverCurrent Protection (OCP)
7.4.3 OverPower Protection (OPP)
7.4.4 Capacitive Mode Protection (CMP)
and external resistor R
threshold level V
level is internally clamped at 2.5 V. C
reasons even when R
OCP is active in the burn and boost states (not during boost transition). When the peak
absolute value of the voltage across the current sense resistor on the SLS pin exceeds
the OCP reference level V
from the capacitor connected to the CP pin for the next full cycle. If the overcurrent is
absent at the end of this cycle, this current is disabled. Instead a current, equal to I
sourced to CP. If the overcurrent occurs in more than half the number of cycles, there is a
net discharging of the capacitor connected to the CP pin. When the voltage, on the CP pin
drops lower than V
condition, the overcurrent time-out of t
power-down mode. The V
ignition state.
OPP is active in boost and burn state. The lamp current is limited and regulated to its
nominal designed lamp current in case overvoltage situations on the mains supply occur.
Overpower begins when the DCI voltage, that regulates the lamp current is exceeding the
maximum DCI input range. Internally the DCI voltage is clamped to the maximum input
voltage level V
voltage fluctuations.
CMP is active in the ignition, burn and boost states and during boost transition. The signal
across resistor R
half-bridge. When conditions are normal, the current flows from the source of the LS
transistor to the half-bridge when the LS transistor is switched on. This results in a
negative voltage on the SLS pin. As the circuit yields to capacitive mode, the voltage
decreases and eventually reverses polarity. The protection prevents this condition from
happening by checking if the voltage on the SLS pin is higher than V
If the voltage across resistor R
transistor is switched on, the circuit assumes that it is in capacitive mode. When
capacitive mode is detected, the currents from the OTA are disabled and the capacitive
mode sink current, I
circuitry on the CI pin and as a result gradually increase the half-bridge frequency.
Discharge continues for the remainder of the current switching cycle, so the total current
on CI is equal to the sink current. If capacitive mode persists, the action is repeated until
capacitive mode is not detected. If capacitive mode is no longer detected, the OTA starts
regulating again.
If the conditions causing the capacitive mode persist, the OTA regulates the system back
towards capacitive mode with the protection system taking control. The system operates
on the edge of capacitive mode. During boost and burn state, if the load on the half-bridge
continues to be capacitive at higher frequencies, CMP then eventually drives the
half-bridge to the maximum frequency f
power-down mode.
T(hec3)DCI
All information provided in this document is subject to legal disclaimers.
350 V and 600 V Power ICs for dimmable compact fluorescent lamps
th(sat)SLS
SLS
th(CP)min,
o(sink)CI
also provides information about the switching behavior of the
Rev. 2 — 8 September 2011
LSAT
LSAT
see
is possible. When resistor R
th(ocp)SLS
th(ocp)SLS
, is enabled. This sink current discharges the capacitor/resistor
is not mounted.
connected to the LSAT pin, a more secure setting of the
the IC enters power-down mode. In a continuous overcurrent
Figure
SLS
is higher than the V
, overcurrent is detected. A current I
level corresponds with the V
10. The DCI clamp level is independent of any supply
LSAT
fault(oc)
bridge(max)
parallel to R
takes about
. From this point, the IC enters
LSAT
LSAT
th(capm)SLS
1
⁄
is not mounted, the V
10
is obligatory for stability
t
ph
UBA20271/2
. The IC then enters the
th(sat)SLS
threshold when the LS
th(capm)SLS
o(CP)
© NXP B.V. 2011. All rights reserved.
level during the
is then sunk
.
th(sat)SLS
o(CP)
15 of 33
, is