uba20271 NXP Semiconductors, uba20271 Datasheet - Page 11

• Manufacturer Part Number: uba20271
• Description: 350 V And 600 V Power Ics For Dimmable Compact Fluorescent Lamps
• Manufacturer: NXP Semiconductors

NXP Semiconductors
UBA20271_UBA20272
Product data sheet
7.2.1 Oscillation
7.2 Oscillation and timing
When CP is lower than V
start-up state. See
lower than V
With a 470 nF capacitor on the CP pin, the typical hold state retention delay is between
1.0 seconds and 1.7 seconds. However, it depends on where the preheat cycle is cut off
on the rising or falling edge of the preheat timing. The retention time for a failed ignition
always starts from the top of the rising edge on the CP pin. See
a latch is set (hold state latch = 1), the oscillator is stopped, transistor HS is
non-conductive and transistor LS conducting. The voltage on pin V
V
Figure
The alternating supply voltage is a result of the current drawn by the IC supply pin V
The supply current is less than 220 A, when the supply voltage V
between V
decreasing between V
slope of V
condition enables comparators in the IC to monitor the voltage on the CP pin and whether
the supply voltage V
The internal oscillator is a VCO circuit which generates a sawtooth waveform between the
V
determine the frequency of the sawtooth. R
maximum switching frequencies. Their ratio is internally fixed. There are two ratios, the
ratio between f
f
Transistors HS (Q1) and LS (Q2) are brought into conduction with a duty cycle of
approximately 50 %.
signals. The oscillator starts oscillating at f
gate drive signals V
bridge(bst)min
th(CF)max
DD(start)
5.
and V
level and 0 V. Capacitor C
DD
DD(stop)
is 4.6. The sawtooth frequency is twice the half-bridge frequency.
DD(rst)
as the internal analog supply is turned on when V
bridge(max)
DD(stop)
All information provided in this document is subject to legal disclaimers.
350 V and 600 V Power ICs for dimmable compact fluorescent lamps
and V
and the IC is reset.
Figure
GLS
DD
Figure 8
Rev. 2 — 8 September 2011
as long as the voltage on the CP pin has not reached V
DD(start)
decreases lower than V
and V
DD(start)
and f
th(rel)CP,
3. Alternatively, the hold state ends when the supply voltage is
bridge(min)
GHS
and V
provides an overview of the oscillator signal and driver
. The supply current is typically 2 mA when V
the IC is released from the hold state and moves to the
is t
DD(stop)
CF
no
, resistor R
is 2.5 and the ratio between f
.
bridge(max)
. More current is drawn during the decreasing
ext(RREF)
DD(stop)
ext(RREF)
. The non-overlap time between the
and C
.
, and the voltage at the CI pin
CF
determine the minimum and
DD
Figure
UBA20271/2
> V
DD
DD
bridge(max)
DD(start)
is increasing
alternates between
5. In the hold state,
© NXP B.V. 2011. All rights reserved.
DD
. This
th(rel)CP.
and
is
11 of 33
DD
See
.