x9523v20iz-bt1 Intersil Corporation, x9523v20iz-bt1 Datasheet - Page 2

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x9523v20iz-bt1

Manufacturer Part Number
x9523v20iz-bt1
Description
Dual Dcp, Por, Dual Voltage Monitors
Manufacturer
Intersil Corporation
Datasheet
Ordering Information
*Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
DETAILED DEVICE DESCRIPTION
The X9523 combines two Intersil Digitally Controlled
Potentiometer (DCP) devices, V1/Vcc power-on reset
control, V1/Vcc low voltage reset control, and two sup-
plementary voltage monitors in one package. These
functions are suited to the control, support, and monitor-
ing of various system parameters in fiber optic modules.
The combination of the X9523 functionality lowers sys-
tem cost, increases reliability, and reduces board space
requirements.
Two high resolution DCPs allow for the “set-and-forget”
adjustment of Laser Driver IC parameters such as Laser
Diode Bias and Modulation Currents.
Applying voltage to V
circuit which allows the V1RO output to go HIGH, until
the supply the supply voltage stabilizes for a period of
time (selectable via software). The V1RO output then
goes LOW. The Low Voltage Reset circuitry allows the
V1RO output to go HIGH when V
mum V
returns to proper operating level. A Manual Reset (MR)
input allows the user to externally trigger the V1RO out-
put (HIGH).
X9523V20I-A
X9523V20I-B
X9523V20IZ-A
(Note)
X9523V20IZ-B
(Note)
NUMBER
PART
CC
trip point. V1RO remains HIGH until V
X9523VIA
X9523VIB
X9523VZIA
X9523VZIB
MARKING
PART
CC
activates the Power-on Reset
2
TEMP RANGE
-40 to +85
-40 to +85
-40 to +85
-40 to +85
(°C)
CC
falls below the mini-
20 Ld TSSOP
20 Ld TSSOP
20 Ld TSSOP
(Pb-free)
20 Ld TSSOP
(Pb-free)
PACKAGE
CC
X9523
PIN CONFIGURATION
Two supplementary Voltage Monitor circuits continuously
compare their inputs to individual trip voltages. If an input
voltage exceeds it’s associated trip level, a hardware out-
put (V3RO, V2RO) are allowed to go HIGH. If the input
voltage becomes lower than it’s associated trip level, the
corresponding output is driven LOW. A corresponding
binary representation of the two monitor circuit outputs
(V2RO and V3RO) are also stored in latched, volatile
(CONSTAT) register bits. The status of these two moni-
tor outputs can be read out via the 2-wire serial port.
Intersil’s unique circuits allow for all internal trip volt-
ages to be individually programmed with high accu-
racy. This gives the designer great flexibility in
changing system parameters, either at the time of
manufacture, or in the field.
The device features a 2-Wire interface and software
protocol allowing operation on an I
serial bus.
V3RO
SDA
R
SCL
R
V
R
WP
MR
W2
V3
H2
SS
L2
NOT TO SCALE
20 Pin TSSOP
10
2
9
1
3
4
5
6
7
8
20
19
18
17
16
15
14
13
12
11
V1 / Vcc
V1RO
V2RO
V2
NC
NC
NC
R
R
R
H1
W1
L1
2
C™ compatible
January 3, 2006
FN8209.1

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