ncp5381a ON Semiconductor, ncp5381a Datasheet - Page 33

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ncp5381a

Manufacturer Part Number
ncp5381a
Description
2/3/4 Phase Buck Controller For Vr10 And Vr11 Pentium Iv Processor Applications
Manufacturer
ON Semiconductor
Datasheet
OVP
OVP protection is enabled as soon as soft−start begins and
is disabled when the part is disabled. When OVP is tripped,
the controller commands all four gate drivers to enable
their low side MOSFETs, and VR_RDY transitions low. In
order to recover from an OVP condition, V
below the UVLO threshold. See the state diagram for
Board Layout
file and schematics are available by request at
www.onsemi.com and can be viewed using the Allegro
Free Physical Viewer 15.x from the Cadence website
http://www.cadence.com/.
The overvoltage protection threshold is not adjustable.
A complete Allegro ATX and BTX demo board layout
Figure 22.
CC
must fall
http://onsemi.com
Figure 23.
33
further details. The OVP circuit monitors the output of
DIFFOUT. If the DIFFOUT signal reaches 180 mV above
the nominal 1.3 V offset the OVP will trip. The DIFFOUT
signal is the difference between the output voltage and the
DAC voltage plus the 1.3 V internal offset. This results in
the OVP tracking the DAC voltage even during a dynamic
change in the VID setting during operation.
Gate Driver and MOSFET Selection
IC (NCP3418B). The NCP3418B driver is optimized to
work with a range of MOSFETs commonly used in CPU
applications.
functionality and is required for the high performance
dynamic VID operation of the part. Contact your local
ON Semiconductor applications engineer for MOSFET
recommendations.
Board Stack−Up
Stack−up and copper thickness as shown.
traces and control lines that propagate away from the
controller IC. Routing should follow the demo board
example. For further information or layout review contact
ON Semiconductor.
ON Semiconductor provides the companion gate driver
The demo board follows the recommended Intel
Close attention should be paid to the routing of the sense
The
NCP3418B
provides
special

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