ncp1578 ON Semiconductor, ncp1578 Datasheet - Page 20
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ncp1578
Manufacturer Part Number
ncp1578
Description
Synchronous Step Down Controller With 50ma Linear Regulator
Manufacturer
ON Semiconductor
Datasheet
1.NCP1578.pdf
(22 pages)
EN_SW
FPWM
4. The ground terminals of input and output
5. Noise sensitive traces such as traces of FB, COMP
be connected to either PGND or AGND but not on
the both.
capacitors, and the low-side MOSFET's source
pin should be connected to PGND ground plane
through (if necessary) multiple vias.
and OCSET should be placed in order to prevent
from interference of high voltage switching signal
traces like SWN, VBST, TG and BG.
10nF
Coc
Ren_ldo
100k
Roc
4.7k
EN_LDO
EN_SW
OCSET
MBR0530T1
FPWM
FOFF
Dbst
Figure 37. Typical Application Schematic Diagram
Rldo
10
1
2
3
4
5
20
6
0.1uF
Cbst
Cldo
1uF
NCP1578NMR2
19
7
Cvbat
1uF
U1
http://onsemi.com
18
8
Cvccp
Rfb3
NCP1578
1uF
1.8k
17
9
20
16
10
NTMS7N03R2
15
14
13
12
11
NTMS7N03R2
Rfb1
100
PGND
PGDLY
PGOOD
SS
COMP
6. The feedback resistor divider should be placed as
7. To minimize the effect of parasitic impedance,
Rfb2a
5.6k
M2
close as possible to FB pin. The output voltage
sensing signal should be come up from the
separated noise free signal trace.
traces between gate drivers to MOSFET's gates
should be as shortest as possible.
M1
Rcmp
2.7k
10nF
Cfb
Ccmp1
680pF
Cpgdly
18nF
82nF
Css
Ccmp2
10uF
Cin1
2.7nF
0.1uF
Cin2
2.2uH
L1
VBAT
180uF
Co1
180uF
Co2
AGND PGND
MBRM120L
D1
Co3
1uF
VO
3.3V, 5A
PGOOD