ncp1578 ON Semiconductor, ncp1578 Datasheet - Page 17

• Manufacturer Part Number: ncp1578
• Description: Synchronous Step Down Controller With 50ma Linear Regulator
• Manufacturer: ON Semiconductor

Introduction
mode control loop for a synchronous-rectified buck
converter. The voltage output V
level which is basically governed by the following formula
In order to provide proper regulation, the error amplifier is
compared with the internal reference voltage and the output
Equations Involved in Compensation Network
guidelines for defining the positions of poles and zeros of the
compensation network.
Output Filter Break Frequency
Compensation Network Break Frequency
Figure 35 depicts the general control blocks of voltage
The following equations are provided as general
V
F
F
F
F
F
LC
ESR
Z1
P1
Z2
out
+
+
+
+
+ 1 )
+
2p
2p
2p L
2p
2p
Figure 35. Buck Converter with Modulator, Output Filter and Compensation Network
R3
( R1 ) R4 )
R3
R1
R2
1
1
ESR
1
C
1
1
out
C2
C1 C2
C1)C2
V
FB
C
Ramp Generator
(LC Double Pole)
out
Gate Driver &
out
(1st Zero)
PWM Logic
is regulated to a reference
NCP1578
C3
(1st Pole)
(ESR Zero)
GENERAL APPLICATION INFORMATION
Error
Amp
(2nd Zero)
A
Vref
(eq. 1)
(eq. 2)
(eq. 3)
(eq. 4)
(eq. 5)
(eq. 6)
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TG
SWN
BG
PGND
COMP
FB
Modulator
NCP1578
Q1
Q2
17
of the error amplifier is used to provide pulse-width
modulated (PWM) wave.
Loop Compensation
LC output filter, type III compensation network is
recommended to provide the good closed loop bandwidth
and phase boot with stability under any circumstances. The
purpose of compensation is to obtain a stable close loop
system with the highest possible bandwidth. In another
word, we need to obtain a ”fast and stable” system.
Guidelines for selecting compensation component
against frequency. It gives the general trend of how system
and its individual components behave. Actually, the
Modulator and Filter Gain has a high peak due to the high Q
factor of the output filter. The Open Loop Error Amplifier
Gain bounds the Compensation Gain. The Converter Gain
is constructed on the graph by summing up the Modulator
and Filter Gain (in dB) and the Compensation Gain (in dB).
The Compensation Gain uses the external impedance
network (R1, R4, C3, C1, C2, R3 at Figure 35) to provide a
Since NCP1578 is a voltage mode PWM controller with
Figure 36 shows an asymptotic plot of the converter gain
C2
R3
VIN
1. Select a value of R1 between 2 kW and 5 kW
2. Target for close loop bandwidth should be less
3. Place 1
4. Place 1
5. Place 2
6. Place 2
L
F
than 50% of switching frequency
CIN
P2
C1
+
C3
R4
2p
st
st
nd
nd
DCR
zero at 50% of filter double pole.
pole at ESR zero
zero at filter double pole
pole at half the switching frequency.
R1
R2
R4
VOUT
1
ESR
COUT
Compensation
Network
C3
Output
Filter
(2nd Pole)
(eq. 7)