ncp1578 ON Semiconductor, ncp1578 Datasheet - Page 19

• Manufacturer Part Number: ncp1578
• Description: Synchronous Step Down Controller With 50ma Linear Regulator
• Manufacturer: ON Semiconductor

undershoot DV
the following equation:
and the voltage overshoot DV
estimated by the following equation:
Where:
I
voltage rating and ripple current rating. In general, the
voltage rating should be at least 1.25 times the output
voltage and the RMS ripple current rating should be greater
then the inductor ripple current.
Output Inductor Selection
two components: an ideal inductance L and an ideal resistor
DCR. The value of L determines the output ripple voltage,
inductor ripple current and performance of load transients.
And DCR contributes the system loss. Hence, the higher the
DCR, the lower the efficiency of the system will be.
maximum load current. So based on this criteria, by simple
rearrangement of Equation 10, the required inductance can
be estimated as follow:-
Where:
I
be about 1.2 times of the peak inductor current at maximum
output load current and in order to achieve the good system
efficiency, DCR should be minimized. In general, inductor
with about 2 mW to 3 mW per mH should be used. In some
cases, larger inductor value can be selected to achieve higher
efficiency as long as it still meets the required voltage
overshoot at load release and inductor DC current rating.
MOSFET Selection
ON-Resistance (R
gate charges (Q
be considered.
power dissipation, it should be the lower the better. In
general, for the buck converter, the R
MOSFET is usually lower than that of high side MOSFET.
O
O(max)
DV
L w
DV
Other parameters for selection of output capacitor are the
Basically, a physical inductor can be simply modeled as
In general, the typical inductor ripple current is 30% of the
In addition, The DC current rating of the inductor should
For selection of MOSFET, gate drive voltage (V
For ON-resistance, in consideration of efficiency and
= Load current step
)
*
0.3
+
+ DI
= Maximum load current
V
I
in
O(max)
* V
-
G
L
ESR )
due to load step up DI can be estimated by
, Q
DSON
o
GD
I
o
V
and Q
C
)
), gate input capacitance (C
in
V
DI
out
o
DI
2
L
C
F
GS
out
+
2
S
) C
) are the key parameters to
I *
due to load release can be
F
S
V
out
V
in
o
DSON
V
2
o
* V
of low side
OUT
(eq. 12)
(eq. 13)
(eq. 11)
GS
http://onsemi.com
) and
GS
NCP1578
),
19
It is because the switching on time of lower side MOSFET
is longer than that of high side MOSFET especially at the
high V
MOSFET and low side MOSFET with RDSON about
7.0 mW and 5.0 mW respectively can achieve good
efficiency.
false switching on due to high dV/dt switching slew rate of
the high side MOSFET, the low side MOSFET should be
selected such that the ratio Q
Overcurrent Protection Component Selection
The overcurrent protection will trip when a peak inductor
current hit the I
Where:
R
I
R
MOSFET's R
prevent from mis-triggering the over current protection in
normal operating condition, R
based on the following corner conditions:-
In addition, a decoupling capacitor Coc should be added in
parallel with R
PCB Layout Guidelines
The following items should be considered when preparing
PCB layout:
OC
OC
DS(on)_HS
Isubs
In order to have better immunity to low side MOSFET
Since I
= Constant current flowing into the OCSET pin
1. The minimum I
2. The maximum high side MOSFET's R
3. Estimate I
1. All high current traces should be kept as short and
2. Power components which include the input
3. The thermal pad of the QFN20 package should be
= Resistor across OCSET pin and V
in
LIM
at the highest junction temperature.
where I
DI
wide as possible to reduce power loss. For
example the input voltage terminal to the drain of
high-side MOSFET, trace from inductor to the
output terminal, etc. Power handling and heat
sinking capability of power traces can be improved
by multiple trace routing at different layer and join
them together with multiple vias.
capacitor, MOSFETs, inductor and output
capacitor must be placed close together to
minimize the current loop.
connected to the ground planes for providing good
heat dissipation. It is recommended to use PCB
with 1 oz or 2 oz copper foil. The thermal pad can
and low V
OC
L
+
= On resistance of the high side MOSFET
= Inductor ripple current.
is varying with device to device and high side
R
R
DS(on)
OC
o_max
OC
LIM
DS(on)_HS
LIM
o
for noise filtering purpose.
case. For practical application, high side
which is determined by the equation:-
varies with temperature, so in order to
I
= Maximum output current rating,
OC
such that I
OC
value from the electrical table.
GD
/Q
OC
LIM
GS
should be determined
should be low enough.
> I
o_max
in
+ DI
DS(on)
L
(eq. 14)
/2
used