ncp1231d65r2g ON Semiconductor, ncp1231d65r2g Datasheet - Page 15

• Manufacturer Part Number: ncp1231d65r2g
• Description: Lowstandby Power High Performance Pwm Controller
• Manufacturer: ON Semiconductor

ShortïCircuit Condition
uses auxiliary windings to detect events on the isolated
secondary output. There maybe some conditions (for
example when the leakage inductance is high) where it can
be extremely difficult to implement shortïcircuit and
overload protection. This occurs because when the power
switch opens, the leakage inductance superimposes a large
spike on the switch drain voltage. This spike is seen on the
isolated secondary output and on the auxiliary winding.
Because the auxiliary winding and diode form a peak
rectifier, the auxiliary V
up to the peak value rather than the true plateau which is
proportional to the output level.
error flag. As soon as the internal 1.0 V error flag is asserted
3
The NCP1231 is different from other controllers which
To resolve these issues the NCP1231 monitors the 1.0 V
CS
100ms
Timer
2.3 Vpp
12.6V
Ramp
Vcc
PWM
1.0 V
Flag
Pin1
PFC
Vcc
7.7V
10 V
18 k
LEB
regulation
5ms
SS
3 V
FB/3
250 ns
PWM Comparator
100ms
Thermal Shutdown
Figure 35.
CC
100 msec Timer
capacitor voltage can be charged
−
+
+
−
LatchïOff
Vccreset
Skip
Stby
R
S
100ms
Stby
confirmed
Q
stby is left
http://onsemi.com
Figure 36.
NCP1231
Nom
Pout
Shortïcircuit
15
100ms
high, a 100 ms timer starts. If at the end of the 100 ms timeout
period, the error flag is still asserted then the controller
determines that there is a true fault condition and stops the
PWM drive output, refer to Figure 36. When this occurs,
V
out. When V
enters a latchïoff phase where the internal consumption is
reduced down to 30 mA. This reduction in current allows the
V
resistor, when V
circuit is activated and the controller goes through a normal
startup. If the fault has gone and the error flag is low, the
controller resumes normal operations.
asserted, the error flag will normally drop prior to the 100 ms
timeout period and the controller continues to operate
normally.
Skip Mode, SW1 opens and the PFC_Vcc output will shut
down and will not be activated until the fault goes away and
the power supply resumes normal operations.
is desirable for the skip duty cycle to be kept below 20%(the
burst dutyïcycle is defined as Tpulse / Tfault).
when V
fault detection method, the controller will not wait for the
100 ms timeïout, or the error flag before it goes into the
latchïoff phase, operating in the skip mode under these
conditions.
CC
CC
Under transient load conditions, if the error flag is
If the 100 msec timer expires while the NCP1231 is in the
While in the Skip Mode, to avoid any thermal runaway it
The latchïoff phase can also be initiated, more classically,
starts to decrease because the power supply is locked
capacitor to be charged up through the external startup
CC
drops below UVLO (7.7 V typical). During this
CC
CC
drops below UVLOlow (7.7 V typical), it
reaches V
100ms
CC
ON (12.6 V), the softïstart
regulation