m29dw641f STMicroelectronics, m29dw641f Datasheet - Page 31

• Manufacturer Part Number: m29dw641f
• Description: 64 Mbit 4mb X16, Multiple Bank, Boot Block 3v Supply Flash Memory
• Manufacturer: STMicroelectronics

M29DW641F
6.2
6.2.1
6.2.2
Fast Program commands
The M29DW641F offers a set of Fast Program commands to improve the programming
throughput:
When V
Program mode. The user can then choose to issue any of the Fast Program commands.
Care must be taken because applying a V
any protected block.
Only one bank can be programmed at any one time. The other bank must be in Read mode
or Erase Suspend. After programming has started, Bus Read Operations in the Bank being
programmed output the Status Register content, while Bus Read Operations to the other
Bank output the contents of the memory array. Fast Program commands can be suspended
and then resumed by issuing a Program Suspend command and a Program Resume
command, respectively (see
Program Resume
After the Fast Program command has completed, the memory will return to the Read mode,
unless an error has occurred. When an error occurs Bus Read Operations to the Bank
where the command was issued will continue to output the Status Register. A Read/Reset
command must be issued to reset the error condition and return to Read mode.
One of the Erase commands must be used to set all the bits in a block or in the whole
memory from ’0’ to ’1’.
Typical Program times are given in
Endurance
Program commands.
Double Word Program command
This is used to write two adjacent Words simultaneously. The addresses of the two Words
must differ only in A0. Three bus write cycles are necessary to issue the command:
1.
2.
3.
Quadruple Word Program command
This is used to write four adjacent Words simultaneously. The addresses of the four Words
must differ only in A1 and A0. Five bus write cycles are necessary to issue the command:
1.
2.
3.
4.
5.
Double and Quadruple Word, Program
Unlock Bypass
The first bus cycle sets up the command.
The second bus cycle latches the Address and the Data of the first Word to be written.
The third bus cycle latches the Address and the Data of the second Word to be written
and starts the Program/Erase Controller.
The first bus cycle sets up the command.
The second bus cycle latches the Address and the Data of the first Word to be written.
The third bus cycle latches the Address and the Data of the second Word to be written.
The fourth bus cycle latches the Address and the Data of the third Word to be written.
The fifth bus cycle latches the Address and the Data of the fourth Word to be written
and starts the Program/Erase Controller.
PPH
cycles. See either
is applied to the V
command).
Section 6.1.8: Program Suspend command
PP
Table 9: Fast Program
/Write Protect pin the memory automatically enters the Fast
Table 12: Program, Erase Times and Program, Erase
PPH
to the V
commands, for a summary of the Fast
PP
/WP pin will temporarily unprotect
Command interface
and
Section 6.1.9:
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