s-24c04bphal Seiko Instruments Inc., s-24c04bphal Datasheet - Page 17
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s-24c04bphal
Manufacturer Part Number
s-24c04bphal
Description
2-wire Cmos Serial E2prom
Manufacturer
Seiko Instruments Inc.
Datasheet
1.S-24C04BPHAL.pdf
(35 pages)
7.3 Sequential read
Rev.3.0
When the E
current and random read operations following the start condition signal, it outputs the acknowledge signal.
When 8-bit data is output from the E
counter inside the E
8th data is output.
When the master device transmits the acknowledge signal, the next memory address data is output.
When the master device transmits the acknowledge signal, the memory address counter inside the
E
When the master device does not output an acknowledge signal and transmits the stop condition signal, the
read operation is finished.
Data can be read in the “Sequential Read” mode in succession. When the memory address counter reaches
the last word address, it rolls over to the first memory address.
2
PROM is incremented and data can be read in succession. This is called “Sequential Read”.
SDA
line
_00
DEVICE
ADDRESS
2
PROM receives a 7-bit device address and the 1-bit read/write instruction code “1” in both
R
E
A
D
R
W
1
/
A
C
K
2
D7
PROM is automatically incremented at the falling edge of the SCL clock at which the
DATA (n)
ADR INC
D0
Figure 15 Sequential Read
2
PROM, in synchronization with the SCL clock, the memory address
A
C
K
D7
Seiko Instruments Inc.
DATA (n +1 )
ADR INC
D0
A
C
K
D7
DATA (n + 2)
2-WIRE CMOS SERIAL E
ADR INC
D0
A
C
K
D7
No ACK from
master device
DATA (n + x)
S-24C04BPHAL
ADR INC
D0
2
PROM
S
T
O
P
17