s-24c04bphal Seiko Instruments Inc., s-24c04bphal Datasheet - Page 11

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s-24c04bphal

Manufacturer Part Number
s-24c04bphal
Description
2-wire Cmos Serial E2prom
Manufacturer
Seiko Instruments Inc.
Datasheet
5. Device addressing
Rev.3.0
To perform data communications, the master device mounted on the system outputs the start condition signal
to the slave device. Next, the master device outputs a 7-bit device address and a 1-bit read/write instruction
code onto the SDA bus.
The higher 4 bits of the device address are called the “Device Code”, and are fixed to “1010”. The following 2
bits are “don’t care” bits.
When the comparison results match, the slave device outputs the acknowledge signal during the 9th clock
cycle.
In the S-24C04BPHAL, the 7th bit is a page address bit.
Accordingly, when P0 = 0, the first half of the memory area (2 Kb: addresses 000h to 0FFh) is selected; when
P0 = 1, the second half of the memory area (2 Kb; addresses 100h to 1FFh) are selected.
_00
S-24C04BPHAL
MSB
Remark X: Don’t care
1
Device code
Figure 9 Device Address
0
Seiko Instruments Inc.
1
0
X
Don’t
care
2-WIRE CMOS SERIAL E
X
address
Page
P0
R / W
S-24C04BPHAL
LSB
2
PROM
11

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