at45db081d-su-sl955 ATMEL Corporation, at45db081d-su-sl955 Datasheet - Page 4

• Manufacturer Part Number: at45db081d-su-sl955
• Description: 8-megabit 2.5-volt Or 2.7-volt Dataflash
• Manufacturer: ATMEL Corporation

3. Block Diagram
4. Memory Array
To provide optimal flexibility, the memory array of the AT45DB081D is divided into three levels of granularity comprising of
sectors, blocks, and pages. The “Memory Architecture Diagram” illustrates the breakdown of each level and details the
number of pages per sector and block. All program operations to the DataFlash occur on a page by page basis. The erase
operations can be performed at the chip, sector, block or page level.
Figure 4-1.
4
SECTOR ARCHITECTURE
RESET
AT45DB081D
SECTOR 14 = 256 Pages
SECTOR 15 = 256 Pages
SECTOR 1 = 256 Pages
SECTOR 2 = 256 Pages
SECTOR 0b = 248 Pages
SECTOR 0a = 8 Pages
GND
VCC
SCK
65,536/67,584 bytes
65,536/67,584 bytes
65,536/67,584
65,536/67,584 bytes
63,488/65,472 bytes
2,048/2,112 bytes
WP
CS
Memory Architecture Diagram
bytes
PAGE (256/264 BYTES)
BUFFER 1 (256/264 BYTES)
SECTOR 0a
SI
BLOCK ARCHITECTURE
Block = 2,048/2,112 bytes
FLASH MEMORY ARRAY
I/O INTERFACE
BLOCK 510
BLOCK 511
BLOCK 30
BLOCK 31
BLOCK 32
BLOCK 33
BLOCK 62
BLOCK 63
BLOCK 64
BLOCK 65
BLOCK 0
BLOCK 1
BLOCK 2
BUFFER 2 (256/264 BYTES)
8 Pages
SO
PAGE ARCHITECTURE
Page = 256/264 bytes
PAGE 4,094
PAGE 4,095
PAGE 14
PAGE 15
PAGE 16
PAGE 17
PAGE 18
PAGE 0
PAGE 1
PAGE 6
PAGE 7
PAGE 8
PAGE 9
3596I–DFLASH–4/08