at45db081d-su-sl955 ATMEL Corporation, at45db081d-su-sl955 Datasheet - Page 21

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at45db081d-su-sl955

Manufacturer Part Number
at45db081d-su-sl955
Description
8-megabit 2.5-volt Or 2.7-volt Dataflash
Manufacturer
ATMEL Corporation
Datasheet
10.2.2
Figure 10-4. Read Security Register
3596I–DFLASH–4/08
CS
SO
Reading the Security Register
SI
Each transition
represents 8 bits
Opcode
The Security Register can be read by first asserting the CS pin and then clocking in an opcode
of 77H followed by three dummy bytes. After the last don’t care bit has been clocked in, the con-
tent of the Security Register can be clocked out on the SO pin. After the last byte of the Security
Register has been read, additional pulses on the SCK pin will simply result in undefined data
being output on the SO pins.
Deasserting the CS pin will terminate the Read Security Register operation and put the SO pin
into a high-impedance state.
X
X
X
Data Byte
n
Data Byte
n + 1
AT45DB081D
Data Byte
n + x
21

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