m29f002b-70p6tr STMicroelectronics, m29f002b-70p6tr Datasheet - Page 4
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m29f002b-70p6tr
Manufacturer Part Number
m29f002b-70p6tr
Description
2 Mbit 256kb X8, Boot Block Single Supply Flash Memory
Manufacturer
STMicroelectronics
Datasheet
1.M29F002B-70P6TR.pdf
(21 pages)
M29F002BT, M29F002BB, M29F002BNT, M29F002BNB
Table 2. Absolute Maximum Ratings
Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may
BUS OPERATIONS
There are five standard bus operations that control
the device. These are Bus Read, Bus Write, Out-
put Disable, Standby and Automatic Standby. See
Table 5, Bus Operations, for a summary. Typically
glitches of less than 5ns on Chip Enable or Write
Enable are ignored by the memory and do not af-
fect bus operations.
Bus Read. Bus Read operations read from the
memory cells, or specific registers in the Com-
mand Interface. A valid Bus Read operation in-
volves setting the desired address on the Address
Inputs, applying a Low signal, V
and Output Enable and keeping Write Enable
High, V
value, see Figure 8, Read Mode AC Waveforms,
and Table 12, Read AC Characteristics, for details
of when the output becomes valid.
Bus Write. Bus Write operations write to the
Command Interface. A valid Bus Write operation
begins by setting the desired address on the Ad-
dress Inputs. The Address Inputs are latched by
the Command Interface on the falling edge of Chip
Enable or Write Enable, whichever occurs last.
The Data Inputs/Outputs are latched by the Com-
mand Interface on the rising edge of Chip Enable
or Write Enable, whichever occurs first. Output En-
able must remain High, V
Write operation. See Figures 9 and 10, Write AC
Waveforms, and Tables 13 and 14, Write AC
Characteristics, for details of the timing require-
ments.
Output Disable. The Data Inputs/Outputs are in
the high impedance state when Output Enable is
High, V
4/21
Symbol
2. Minimum Voltage may undershoot to –2V during transition and for less than 20ns during transitions.
V
T
T
V
V
IO
BIAS
T
STG
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-
ity documents.
CC
IH
IH
ID
A
(2)
. The Data Inputs/Outputs will output the
.
Ambient Operating Temperature (Temperature Range Option 1)
Ambient Operating Temperature (Temperature Range Option 6)
Ambient Operating Temperature (Temperature Range Option 3)
Temperature Under Bias
Storage Temperature
Input or Output Voltage
Supply Voltage
Identification Voltage
IH
, during the whole Bus
IL
, to Chip Enable
(1)
Parameter
Standby. When Chip Enable is High, V
Inputs/Outputs pins are placed in the high-imped-
ance state and the Supply Current is reduced to the
Standby level.
When Chip Enable is at V
duced to the TTL Standby Supply Current, I
further reduce the Supply Current to the CMOS
Standby Supply Current, I
be held within V
els see Table 11, DC Characteristics.
During program or erase operations the memory will
continue to use the Program/Erase Supply Current,
I
ation completes.
Automatic Standby. If CMOS levels (V
are used to drive the bus and the bus is inactive for
150ns or more the memory enters Automatic Stand-
by where the internal Supply Current is reduced to
the CMOS Standby Supply Current, I
Inputs/Outputs will still output data if a Bus Read op-
eration is in progress.
Special Bus Operations
Additional bus operations can be performed to read
the Electronic Signature and also to apply and re-
move Block Protection. These bus operations are
intended for use by programming equipment and
are not usually used in applications. They require
V
Electronic Signature. The
codes, the manufacturer code and the device code,
that can be read to identify the memory. These
codes can be read by applying the signals listed in
Table 5, Bus Operations.
CC4
ID
to be applied to some pins.
, for Program or Erase operations until the oper-
CC
± 0.2V. For Standby current lev-
IH
–0.6 to 13.5
–40 to 125
–50 to 125
–65 to 150
CC3
–40 to 85
–0.6 to 6
–0.6 to 6
the Supply Current is re-
0 to 70
Value
, Chip Enable should
memory
CC3
IH
CC
. The Data
has
, the Data
CC2
± 0.2V)
Unit
°C
°C
°C
°C
°C
V
V
V
. To
two