hyb18t512161bf-33 Infineon Technologies Corporation, hyb18t512161bf-33 Datasheet - Page 32

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hyb18t512161bf-33

Manufacturer Part Number
hyb18t512161bf-33
Description
512-mbit X16 Gddr2 Dram
Manufacturer
Infineon Technologies Corporation
Datasheet
ODT timing modes
Depending on the operating mode asynchronous or
synchronous ODT timings apply.
Asynchronous ODT timings (
the on-die DLL is disabled.
These modes are:
Figure 9
Note:
1. Synchronous ODT timings apply for Active Mode
2. ODT turn-on time (
Data Sheet
and Standby Mode with CKE HIGH and for the
“Fast Exit” Active Power Down Mode (MRS bit A12
set to “0”). In all these modes the on-die DLL is
enabled.
leaves high impedance and ODT resistance begins
ODT Timing for Active and Standby (Idle) Modes (Synchronous ODT timings)
t
AON.MIN
t
AOFPD
) is when the device
,
t
AONPD
) apply when
32
Synchronous ODT timings (
apply for all other modes.
3. ODT turn off time min. (
512-Mbit Double-Data-Rate-Two SDRAM
Slow Exit Active Power Down Mode (with MRS bit
A12 is set to “1”)
Precharge Power Down Mode
to turn on. ODT turn on time max. (
the ODT resistance is fully on. Both are measured
from t
starts to turn off the ODT resistance.ODT turn off
time max. (
impedance. Both are measured from
AOND
.
t
AOF.MAX
HYB18T512161BF–22/25/28/33
) is when the bus is in high
t
AOF.MIN
t
Functional Description
AOND
05102005-C5U8-7TLE
) is when the device
,
Rev. 1.1, 2005-08
t
t
AOFD
AON.MAX
t
AOFD
,
t
AON
) is when
.
,
t
AOF
)

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