lh28f400su-lc Sharp Microelectronics of the Americas, lh28f400su-lc Datasheet

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lh28f400su-lc

Manufacturer Part Number
lh28f400su-lc
Description
512k 256k Flash Memory
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
LH28F400SU-LC
FEATURES
User-Configurable x8 or x16 Operation
5 V Write/Erase Operation
(5 V V
– No Requirement for DC/DC Converter
150 ns Maximum Access Time
(V
Minimum 2.7 V Read Capability
– 190 ns Maximum Access Time
32 Independently Lockable Blocks (16K)
100,000 Erase Cycles per Block
Automated Byte Write/Block Erase
– Command User Interface
– Status Register
– RY
System Performance Enhancement
– Erase Suspend for Read
– Two-Byte Write
– Full Chip Erase
Data Protection - Hardware Erase/Write
Lockout during Power Transitions
– Software Erase/Write Lockout
Independently Lockable for Write/Erase
on Each Block (Lock Block and Protect
Set/Reset)
4 µA (Typ.) I
0.2 µA (Typ.) Deep Power-Down
Extended Temperature Operation
– -40°C to +85°C
State-of-the-Art 0.55 µm ETOX™ Flash
Technology
56-Pin, 1.2 mm × 14 mm × 20 mm TSOP
(Type I) Package
48-Pin 1.2 mm × 12 mm × 18 mm TSOP
(Type I) Package
44-Pin 600-mil SOP Package
to Write/Erase
CC
(V
CC
    »
/ BY
= 3.3 V ± 0.3 V)
PP
= 2.7 V)
, 3.3 V V
    »
Status Output
CC
in CMOS Standby
CC
)
56-PIN TSOP
RY/BY
4M (512K × 8, 256K × 16) Flash Memory
V
WE
A
A
A
A
A
A
A
NC
NC
NC
NC
NC
NC
NC
RP
NC
A
A
A
A
A
A
A
A
PP
A
Figure 1. 56-Pin TSOP Configuration
15
14
13
12
11
10
17
9
8
7
6
5
4
3
2
1
10
12
13
14
15
16
17
18
19
20
22
23
24
25
26
27
28
11
21
2
3
4
5
6
7
8
9
1
29
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
28F400SUH-LC15-1
DQ
DQ
DQ
DQ
TOP VIEW
NC
A
BYTE
GND
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
V
V
DQ
DQ
DQ
DQ
QE
GND
CE
A
NC
NC
16
CC
CC
0
3
10
2
9
15
7
14
6
13
5
12
4
11
1
8
0
/A
-1
1

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lh28f400su-lc Summary of contents

Page 1

... LH28F400SU-LC FEATURES • User-Configurable x8 or x16 Operation • Write/Erase Operation ( 3 – No Requirement for DC/DC Converter to Write/Erase • 150 ns Maximum Access Time (V = 3.3 V ± 0 • Minimum 2.7 V Read Capability – 190 ns Maximum Access Time ( • 32 Independently Lockable Blocks (16K) • ...

Page 2

... LH28F400SU-LC 48-PIN TSOP RY/ Figure 2. 48-PIn TSOP Configuration 2 4M (512K × 8, 256K × 16) Flash Memory ...

Page 3

... QUEUE LATCHES ADDRESS COUNTER Figure 4. LH28F004SU-LC Block Diagram OUTPUT INPUT BUFFER BUFFER DATA ID QUEUE REGISTER REGISTERS CSR REGISTER ESRs DATA COMPARATOR Y GATING/SENSING . . . . . . LH28F400SU-LC INPUT BUFFER I/O BYTE LOGIC CE OE CUI WE RP RY/BY WSM PROGRAM/ ERASE V PP VOLTAGE SWITCH V CC GND 28F400SUH-LC15-2 3 ...

Page 4

... LH28F400SU-LC PIN DESCRIPTION SYMBOL TYPE BYTE-SELECT ADDRESSES: Selects between high and low byte when device INPUT x8 mode. This address is latched in x8 Data Writes. Not used in x16 mode (i.e., the WORD-SELECT ADDRESSES: Select a word within one 16K block. These INPUT ...

Page 5

... PCMCIA card information, ROM-Executable OS or Read) Application Code. Each block has an associated non- volatile lock-bit which determines the lock status of the block. In addition, the LH28F400SU-LC has a software controlled master Write Protect circuit which prevents any modifications to memory blocks whose lock-bits are set. ...

Page 6

... BY     » pins together in a multiple memory con- figuration such as a Resident Flash Array. The LH28F400SU-LC is specified for a maximum access time of 150 3.3 V operation (3.0 to ACC 3.6 V) over the commercial temperature range. A corre- sponding maximum access time of 190 +70° ...

Page 7

... BY , which is either tied to V through a resistor. When the provide device ID codes. Device ID code = 23H (x8 PPH until all operations are complete. OL LH28F400SU-LC » » NOTE ...

Page 8

... Resume command (D0H) after completed next Erase command. Beside, when the Erase Suspend command is issued, while the device is not in Erase, be sure to issue Resume command (D0H) after the next erase completed. LH28F400SU-LC Performance Enhancement Command Bus Definitions FIRST BUS CYCLE COMMAND MODE OPER ...

Page 9

... Write/Erase operation to each block. There are unassigned commands not recom- mended that the customer use any command other than the valid commands specified in “Command Bus Defi- nitions”. Sharp reserved the right to redefine these codes for future functions. LH28F400SU- level ...

Page 10

... LH28F400SU-LC START WRITE 40H or 10H WRITE DATA/ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR CSR FULL STATUS CHECK IF DESIRED OPERATION COMPLETE CSR FULL STATUS CHECK PROCEDURE READ CSRD (see above) 0 DATA WRITE CSR. SUCCESSFUL LOW PP CSR.3 = DETECT 0 CLEAR CSRD RETRY/ERROR RECOVERY Figure 6. Word/Byte Writes with Compatible Status Register 10 4M (512K × ...

Page 11

... Write FFH after the last operation to reset device to read array mode. See Command Bus Cycle notes for description of codes. BUS COMMAND OPERATION Standby Standby CSR. should be cleared, if set, before further attempts are initiated. LH28F400SU-LC COMMENTS D = 20H D0H CSRD Toggle update CSRD Check CSR ...

Page 12

... LH28F400SU-LC START WRITE B0H READ COMPATIBLE STATUS REGISTER 0 CSR CSR.6 = ERASE COMPLETED 1 WRITE FFH READ ARRAY DATA DONE NO READING YES WRITE D0H WRITE FFH ERASE RESUMED READ ARRAY DATA Figure 8. Erase Suspend to Read Array with Compatible Status Register 12 4M (512K × 8, 256K × 16) Flash Memory ...

Page 13

... If CSR. set command sequence error, should be cleared before further attempts are initiated. Write FFH after the last operation to reset device to read array mode. See Command Bus Definitions for description of codes. Figure 9. Block Locking Scheme LH28F400SU-LC COMMENTS Q = CSRD Toggle update CSRD WSM Ready ...

Page 14

... LH28F400SU-LC START RESET WP (NOTE 1) ERASE BLOCK (NOTE 2) SET WP (NOTE 3) WRITE NEW DATA TO BLOCK (NOTE 4) RELOCK BLOCK (NOTE 5) OPERATION COMPLETE FLOW TO REWRITE DATA NOTES: 1. Use Reset-Write-Protect flowchart. Enable Write/Erase operation to all blocks. 2. Use Block-Erase flowchart. Erasing a block clears any previously established lockout for that block. ...

Page 15

... CSR Full Status Check can be done after each 2-Byte Write, or after a sequence of 2-Byte Writes. Write FFH after the last operation to reset device to read array mode. See Command Bus Cycle notes for description of codes. LH28F400SU-LC is automatically 10 28F400SUH-LC15-9 15 ...

Page 16

... LH28F400SU-LC START READ COMPATIBLE STATUS REGISTER 0 CSR WRITE FBH WRITE DATA/A -1 WRITE DATA/ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR (NOTE) 1 CSR. ANOTHER YES 2-BYTE WRITE NO OPERATION COMPLETE Figure 12. Two-Byte Serial Writes with Compatible Status Registers (56-pin TSOP, 44-pin SOP (512K × 8, 256K × 16) Flash Memory ...

Page 17

... Write FFH after the last operation to reset device to read array mode. See Command Bus Cycle notes for description of codes. BUS OPERATION Standby Standby CSR. should be cleared, if set, before further attempts are initiated. LH28F400SU-LC COMMAND COMMENTS Erase All D = A7H Unlocked Blocks D = D0H ...

Page 18

... LH28F400SU-LC START READ COMPATIBLE STATUS REGISTER 0 CSR WRITE 57H WRITE CONFIRM DATA/ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR (NOTE) 1 CSR. OPERATION COMPLETE 18 4M (512K × 8, 256K × 16) Flash Memory BUS COMMAND OPERATION Read Write Set Write Protect Set Confirm Write Read ...

Page 19

... Reset Write Protect command enables Write/Erase operation to all blocks. Write FFH after the last operation to reset device to Read Array Mode. See Command Bus Cycle notes for description of codes. Figure 15. Reset Write Protect LH28F400SU-LC COMMENTS Check CSR WSM Ready 0 = WSM Busy D = 47H ...

Page 20

... LH28F400SU-LC ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings* Temperature under bias ......................... 0°C to +70°C Storage temperature ......................... -65°C to +125° 3.3 V ± 0.3 V Systems CC SYMBOL PARAMETER T Operating Temperature, Commercial with Respect to GND Supply Voltage with Respect to GND PP PP Voltage on any Pin (Except V ...

Page 21

... PIN STATES H High L Low V Valid X Driven, but not necessarily valid Z High Impedance 1.5 OUTPUT FROM OUTPUT UNDER TEST 28F400SUH-LC15-14 Figure 17. Transient Equivalent Testing = 3.3 V) LH28F400SU-LC 2 TRANSMISSION LINE TEST POINT TOTAL CAPACITANCE = 50 pF 28F400SUH-LC15-15 Load Circuit ( ...

Page 22

... LH28F400SU-LC DC Characteristics V = 3.3 V ± 0 0°C to +70° SYMBOL PARAMETER I Input Load Current IL I Output Leakage Current Standby Current CCS CC V Deep Power-Down CC I CCD Current Read Current CCR Read Current CCR Write Current CCW ...

Page 23

... 25°C. These currents are valid for all less than Static operation. CCR     » (MAX < GND + 0.2 V. PPL LH28F400SU-LC TEST CONDITIONS NOTE V > Word/Byte PP PPH Write in Progress PPH Block Erase in Progress ...

Page 24

... LH28F400SU-LC AC Characteristics - Read Only Operations V = 3.3 V ± 0 0°C to +70° SYMBOL PARAMETER t Read Cycle Time AVAV » t Address Setup to OE Going Low AVGL t Address to Output Delay AVQV » Output Delay ELQV » High to Output Delay PHQV t OE » ...

Page 25

... Sampled, not 100% tested. 1 (Continued) MIN. MAX. UNITS 190 190 ns 190 ns 900 » » Low 30 ns after the falling edge of CE     » without impact on t LH28F400SU-LC NOTE ELQV 25 ...

Page 26

... LH28F400SU- POWER-UP STANDBY V IH ADDRESSES ( ( ( ( HIGH-Z OH DATA (D/ 5 GND ( (512K × 8, 256K × 16) Flash Memory DEVICE AND ADDRESS SELECTION OUTPUTS ENABLED ADDRESSES STABLE t AVAV ...

Page 27

... HIGH-Z OH DATA ( ADDRESSES STABLE t AVAV t FLEL t AVGL t AVQV t GLQV t ELQV t GLQX t ELQX DATA OUTPUT t AVQV t FLQZ DATA OUTPUT Figure 19. BY     »     » Timing Waveforms LH28F400SU- EHQZ . . . t GHQZ . . . HIGH-Z DATA . . . INPUT HIGH-Z 28F400SUH-LC15-17 27 ...

Page 28

... LH28F400SU-LC POWER-UP AND RESET TIMINGS V POWER ( ADDRESS (A) DATA (Q) Figure 18. V SYMBOL PARAMETER » Low 3.0 V MIN. PL3V CC t Address Valid to Data Valid for V AVQV » High to Data Valid for V PHQV NOTES: CE     » ...

Page 29

... MIN. MAX. UNITS 150 ns 100 480 ns 10 110 110 110 100 120 0 µ 0.3     » for all Command Write operations. LH28F400SU-LC 1 NOTE µs ns µ ...

Page 30

... LH28F400SU-LC WRITE DATA-WRITE OR ERASE DEEP POWER-DOWN SETUP COMMAND V ADDRESSES (A) IH (NOTE AVAV V ADDRESSES (A) IH (NOTE AVAV ( WHEH t ELWL ( ( WLWH V HIGH-Z IH DATA (D/ PHWL V OH RY/BY ( (P) ...

Page 31

... Address and Data are latched on the rising edge of CE TYP. MIN. 150 480 100 0 110 110 110 » Going Low 1 120 0.3     » for all Command Write operations. LH28F400SU-LC 1 MAX. UNITS NOTE 100 µ ...

Page 32

... LH28F400SU-LC WRITE DATA-WRITE DEEP OR ERASE POWER-DOWN SETUP COMMAND V ADDRESSES (A) IH (NOTE AVAV V ADDRESSES (A) IH (NOTE AVAV ( EHWH t WLEL ( ( ELEH V HIGH-Z IH DATA (D/ PHEL V OH RY/BY ( (P) ...

Page 33

... Word Write Mode is valid at x16-bit configuration only. 5. Depends on the number of protected blocks. (1) TYP. MIN. MAX. UNITS 20 µs 30 µs 30 µs 0.33 1.5 s 0.26 1.2 s 0.26 1 19.2 s LH28F400SU-LC TEST CONDITIONS NOTE Byte Write Mode 2 Two-Byte Serial Write Mode 2, 3 Word Write Mode ...

Page 34

... LH28F400SU-LC 56TSOP (TSOP056-P-1420 20.30 [0.799] 19.70 [0.776] 18.60 [0.732] 18.20 [0.717] 0.18 [0.007] 0.08 [0.003] 19.30 [0.760] 18.70 [0.736] MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT 34 4M (512K × 8, 256K × 16) Flash Memory 56 0.50 [0.020] TYP. 0.28 [0.011] 0.12 [0.005] 29 0.13 [0.005] 0.49 [0.019] 0.39 [0.015] 0.22 [0.009] 0.02 [0.001] 1.10 [0.043] 0.90 [0.035] 1.19 [0.047] MAX. PACKAGE BASE PLANE ...

Page 35

... Flash Memory 48TSOP (TSOP048-P-1218) 0.50 [0.020] 0.30 [0.012] TYP. 0.10 [0.004 12.20 [0.480] 11.80 [0.465] MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT 25 16.60 [0.654] 18.40 [0.724] 16.20 [0.638] 17.60 [0.693] 24 0.15 [0.006] 1.10 [0.043] 0.425 [0.017] 0.90 [0.035] 1.20 [0.047] MAX. 0.20 [0.008] 0.425 [0.017] 0.00 [0.000] LH28F400SU-LC 17.00 [0.669] 0.20 [0.008] 0.10 [0.004] 48TSOP 35 ...

Page 36

... LH28F400SU-LC 44SOP (SOP044-P-0600) 1.27 [0.050] TYP. 0.50 [0.020] 0.30 [0.012 28.40 [1.118] 28.00 [1.102] MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT ORDERING INFORMATION LH28F400SU H X -LC15 Device Type Package Speed Example: LH28F400SUHT-LC15 (4M (512K x 8) Flash Memory, 150 ns, 56-pin TSOP (512K × 8, 256K × 16) Flash Memory 23 13 ...

Page 37

... EUROPE SHARP Electronics (Europe) GmbH Microelectronics Division Sonninstraße 3 20097 Hamburg, Germany Phone: (49) 40 2376-2286 Telex: 2161867 (HEEG D) Facsimile: (49) 40 2376-2232 LH28F400SU-LC ASIA SHARP Corporation Integrated Circuits Group 2613-1 Ichinomoto-Cho Tenri-City, Nara, 632, Japan Phone: (07436) 5-1321 Telex: LABOMETA-B J63428 Facsimile: (07436) 5-1532 ...

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