lh28f004su-nc Sharp Microelectronics of the Americas, lh28f004su-nc Datasheet

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lh28f004su-nc

Manufacturer Part Number
lh28f004su-nc
Description
512k Flash Memory
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
LH28F004SU-NC
FEATURES
• Independently Lockable for Write/Erase
512K × 8 Word Configuration
5 V Write/Erase Operation (5 V V
– No Requirement for DC/DC Converter
80 ns Maximum Access Time
32 Independently Lockable Blocks (16K)
100,000 Erase Cycles per Block
Automated Byte Write/Block Interface
– Command User Interface
– Status Register
– RY
System Performance Enhancement
– Erase Suspend for Read
– Two-Byte Write
– Full Chip Erase
Data Protection
– Hardware Erase/Write Lockout during
– Software Erase/Write Lockout
on Each Block (Lock Block and Protect
Set/Reset)
5 µA (Typ.) I
0.2 µA (Typ.) Deep Power-Down
State-of-the-Art 0.45 µm ETOX™ Flash
Technology
40-Pin, 1.2 mm × 10 mm × 20 mm
TSOP (Type I) Package
to Write/Erase
Power Transitions
    »
/ BY
    »
Status Output
CC
in CMOS Standby
PP
)
40-PIN TSOP
RY/BY
WE
V
A
A
A
A
A
A
A
RP
A
A
A
A
A
A
A
A
PP
A
16
15
14
13
12
18
11
9
8
7
6
5
4
3
2
1
Figure 1. TSOP Configuration
10
12
13
14
15
16
17
18
19
20
11
2
3
4
5
6
7
8
9
1
4M (512K × 8) Flash Memory
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
28F004SUT-NC80-1
TOP VIEW
DQ
A
GND
NC
NC
A
DQ
DQ
DQ
DQ
V
V
NC
DQ
DQ
DQ
A
OE
GND
CE
17
10
CC
CC
0
7
6
5
4
3
2
1
0
1

Related parts for lh28f004su-nc

lh28f004su-nc Summary of contents

Page 1

... LH28F004SU-NC FEATURES • 512K × 8 Word Configuration • Write/Erase Operation ( – No Requirement for DC/DC Converter to Write/Erase • Maximum Access Time • 32 Independently Lockable Blocks (16K) • 100,000 Erase Cycles per Block • Automated Byte Write/Block Interface – Command User Interface – ...

Page 2

... LH28F004SU-NC OUTPUT MULTIPLEXER INPUT BUFFER Y-DECODER ADDRESS X-DECODER QUEUE LATCH ADDRESS COUNTER Figure 2. LH28F004SU-NC Block Diagram OUTPUT BUFFER DATA ID QUEUE REGISTER REGISTER CSR REGISTER ESRs DATA COMPARATOR Y GATING/SENSING . . . . . . 4M (512K × 8) Flash Memory INPUT BUFFER I/O LOGIC CE OE CUI ...

Page 3

... WSM operation(s) are terminated, » is high. LH28F004SU-NC » » » is » » pin is floated. 3 ...

Page 4

... Dedicated Block Write/Erase Protection • Command-Controlled Memory Protection Set/Reset Capability The LH28F004SU-NC will be available in a 40-pin, 1.2 mm thick × × TSOP (Type I) pack- age. This form factor and pinout allow for very high board layout densities. A Command User Interface (CUI) serves as the sys- tem interface between the microprocessor or microcontroller and the internal memory operation ...

Page 5

... RY     »     » pins together in a multiple memory configuration such as a Resident Flash Array. The LH28F004SU-NC is specified for a maximum access time operation (4.5 to ACC 5.5 V) over the commercial temperature range (0 to +70°C). The LH28F004SU-NC incorporates an Automatic ...

Page 6

... LH28F004SU-NC BUS OPERATIONS, COMMANDS AND STATUS REGISTER DEFINITIONS Bus Operations MODE RP » CE » Read Output Disable Standby Deep Power-Down Manufacturer Device Write NOTES can for address or control pins except for RY ...

Page 7

... Resume command (D0H) after completed next Erase command. Beside, when the Erase Suspend command is issued, while the device is not in Erase, be sure to issue Resume command (D0H) after the next erase completed. LH28F004SU-NC Performance Enhancement Command Bus Definitions FIRST BUS CYCLE COMMAND MODE OPER ...

Page 8

... LH28F004SU-NC Compatible Status Register WSMS ESS CSR.7 = WRITE STATE MACHINE STATUS (WSMS Ready 0 = Busy CSR.6 = ERASE-SUSPEND STATUS (ESS Erase Suspended 0 = Erase in Progress/Completed CSR.5 = ERASE STATUS (ES Error in Block Erasure 0 = Successful Block Erase CSR.4 = DATA-WRITE STATUS (DWS Error in Data Write 0 = Data Write Successful CSR ...

Page 9

... See Command Bus Cycle notes for description of codes. BUS COMMAND OPERATION Standby Check CSR. Data Write Unsuccessful 0 = Data Write Successful Check CSR.3 Standby CSR. should be cleared, if set, before further attempts are initiated. LH28F004SU-NC COMMENTS COMMENTS Low Detect OK 28F004SUT-NC80-4 9 ...

Page 10

... LH28F004SU-NC START WRITE 20H WRITE D0H AND BLOCK ADDRESS READ COMPATIBLE STATUS REGISTER NO 0 SUSPEND CSR.7 = ERASE 1 CSR FULL STATUS CHECK IF DESIRED OPERATION COMPLETE CSR FULL STATUS CHECK PROCEDURE READ CSRD (see above) 0 ERASE CSR. SUCCESSFUL LOW PP CSR.3 = DETECT 0 CLEAR CSRD ...

Page 11

... WSM Busy Standby Check CSR Erase Suspended 0 = Erase Completed Write Read D = FFH Array Read Read must be from block other than the one suspended. Write Erase D = D0H Resume See Command Bus Cycle notes for description of codes. LH28F004SU-NC COMMENTS 28F004SUT-NC80-6 11 ...

Page 12

... LH28F004SU-NC START READ COMPATIBLE STATUS REGISTER 0 CSR RESET WP READ COMPATIBLE STATUS REGISTER 0 CSR WRITE 77H WRITE D0H AND BLOCK ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR (NOTE) 1 CSR. LOCK YES ANOTHER BLOCK NO SET WP OPERATION COMPLETE 12 BUS COMMAND OPERATION Read Write Reset ...

Page 13

... Use Block-Erase flowchart. Erasing a block clears any previously established lockout for that block. 3. Use Set-Write-Protect flowchart. This step re-implements protection to locked blocks. 4. Use Word/Byte-Write or 2-Byte-Write flowchart sequences to write data. 5. Use Block-Lock flowchart to write lock bit if desired. Figure 9. Updating Data in a Locked Block LH28F004SU-NC START RESET WP (NOTE 1) WRITE MORE ...

Page 14

... LH28F004SU-NC START READ COMPATIBLE STATUS REGISTER 0 CSR WRITE FBH WRITE DATA/A 10 WRITE DATA/ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR (NOTE) 1 CSR. ANOTHER YES 2-BYTE WRITE NO OPERATION COMPLETE Figure 10. Two-Byte SerialWrites with Compatible Status Registers (LH28F00SU (512K × 8) Flash Memory (Apply to LH28F004SU, x8, 40TSOP) ...

Page 15

... Retry Erase All Unlocked Block Erase command to erase all blocks, or issue Single Block Erase to erase all of the unlocked blocks in sequence. 3. Set WP command is issued, if necessary. If CSR.3 (VPPS) is set to '0', after clearing CSR.3/4/5, 1. Retry Erase All Unlocked Block Erase command. LH28F004SU-NC COMMAND COMMENTS Erase All D = A7H Unlocked ...

Page 16

... LH28F004SU-NC START READ COMPATIBLE STATUS REGISTER 0 CSR WRITE 57H WRITE CONFIRM DATA/ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR (NOTE) 1 CSR. OPERATION COMPLETE 16 BUS COMMAND OPERATION Read Write Set Write Protect Set Confirm Write Read Read NOTE: If CSR. set command sequence error, should be cleared before further attempts are initiated ...

Page 17

... Reset Write Protect command enables Write/Erase operation to all blocks. Write FFH after the last operation to reset device to Read Array Mode. See Command Bus Cycle notes for description of codes. Figure 13. Reset Write Protect LH28F004SU-NC COMMENTS Check CSR WSM Ready 0 = WSM Busy D = 47H ...

Page 18

... LH28F004SU-NC ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings* Temperature under bias ......................... 0°C to +80°C Storage temperature ......................... -65°C to +125° 5.0 V ±0.5 V Systems CC SYMBOL PARAMETER T Operating Temperature, Commercial with Respect to GND Supply Voltage with Respect to GND PP PP Voltage on any Pin (Except V ...

Page 19

... PIN STATES H High L Low V Valid X Driven, but not necessarily valid Z High Impedance 2.0 OUTPUT 0.8 FROM OUTPUT UNDER TEST OL (2 TTL and V . Input rise IH IL 28F004SUT-NC80-13 Figure 15. Transient Equivalent Testing = 5.0 V) LH28F004SU-NC 2 TRANSMISSION LINE TEST POINT TOTAL CAPACITANCE = 100 pF 28F004SUT-NC80-14 Load Circuit ( ...

Page 20

... LH28F004SU-NC DC Characteristics V = 5.0 V ± 0 0°C to +70° SYMBOL PARAMETER I Input Load Current IL I Output Leakage Current Standby Current CCS CC V Deep Power-Down CC I CCD Current Read Current CCR Read Current CCR Write Current CCW ...

Page 21

... 0 0.0 5.5 V 5.0 4.5 5 25°C. These currents are valid for all less than Static operation. CCR LH28F004SU-NC TEST CONDITIONS NOTE V > Byte/Two-Byte PP PPH Serial Write in Progress PPH Block Erase in Progress PPH ...

Page 22

... LH28F004SU-NC AC Characteristics - Read Only Operations V = 5.0 V ± 0 0°C to +70° SYMBOL PARAMETER t Read Cycle Time AVAV » t Address Setup to OE Going Low AVGL t Address to Output Delay AVQV » Output Delay ELQV » High to Output Delay PHQV » ...

Page 23

... HIGH-Z OH DATA (D/ 5 GND ( DEVICE AND ADDRESS SELECTION OUTPUTS ENABLED ADDRESSES STABLE t AVAV t AVGL t GLQV t ELQV t GLQX t ELQX t AVQV t PHQV Figure 16. Read Timing Waveforms LH28F004SU- DATA VALID STANDBY . . . POWER-DOWN . . . . . . t EHQZ . . . t GHQZ . . . HIGH-Z VALID OUTPUT . . . 28F004SUT-NC80-15 23 ...

Page 24

... LH28F004SU-NC POWER-UP AND RESET TIMINGS V POWER ( ADDRESS (A) DATA (Q) Figure 17. V SYMBOL PARAMETER » Low 4.5 V MIN. PL5V CC t Address Valid to Data Valid for V AVQV » High to Data Valid for V PHQV NOTES:     » ...

Page 25

... Address and Data are latched on the rising edge of WE TYP. MIN. MAX. UNITS 480 100 µs 13 4.5 0.3     » for all Command Write operations. LH28F004SU-NC 1 NOTE µs ns µ ...

Page 26

... LH28F004SU-NC WRITE DATA-WRITE DEEP OR ERASE POWER-DOWN SETUP COMMAND V ADDRESSES (A) IH (NOTE AVAV V ADDRESSES (A) IH (NOTE AVAV ( WHEH t ELWL ( ( WLWH V HIGH-Z IH DATA (D/ PHWL V OH RY/BY ( (P) ...

Page 27

... Address and Data are latched on the rising edge of CE TYP. MIN. 80 480 100 » Going Low 4.5 0.3     » for all Command Write Operations. LH28F004SU-NC 1 MAX. UNITS NOTE 100 µ ...

Page 28

... LH28F004SU-NC WRITE DATA-WRITE DEEP OR ERASE POWER-DOWN SETUP COMMAND V ADDRESSES (A) IH (NOTE AVAV V ADDRESSES (A) IH (NOTE AVAV ( EHWH t WLEL ( ( ELEH V HIGH-Z IH DATA (D/ PHEL V OH RY/BY ( (P) ...

Page 29

... Block Erase Time (16KB) Full Chip Erase Time NOTES: 1. 25° 5 Excludes System-Level Overhead. 3. Depends on the number of protected blocks. (1) TYP. MIN. MAX. UNITS 13 µs 20 µs 0.22 1.0 s 0.17 1 8.8 - 14.4 s LH28F004SU-NC TEST CONDITIONS NOTE 2 2 Byte Write Mode 2 Two-Byte Serial Write Mode ...

Page 30

... LH28F004SU-NC 40TSOP (TSOP040-P-1020 SEE DETAIL MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT ORDERING INFORMATION LH28F004SU T -NC80 Device Type Package Speed Example: LH28F004SUT-NC80 (4M (512K x 8) Flash Memory, 80 ns, 40-pin TSOP) 30 18.60 [0.732] 18.20 [0.717] 19.30 [0.760] 18.70 [0.736] 20.30 [0.799] 19.70 [0.776] 80 Access Time (ns) 40-pin, 1 TSOP (Type I) (TSOP040-P-1020) 4M (512K x 8) Flash Memory 4M (512K × ...

Page 31

... EUROPE SHARP Electronics (Europe) GmbH Microelectronics Division Sonninstraße 3 20097 Hamburg, Germany Phone: (49) 40 2376-2286 Telex: 2161867 (HEEG D) Facsimile: (49) 40 2376-2232 LH28F004SU-NC ASIA SHARP Corporation Integrated Circuits Group 2613-1 Ichinomoto-Cho Tenri-City, Nara, 632, Japan Phone: (07436) 5-1321 Telex: LABOMETA-B J63428 Facsimile: (07436) 5-1532 ...

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