cy62148e Cypress Semiconductor Corporation., cy62148e Datasheet

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cy62148e

Manufacturer Part Number
cy62148e
Description
4-mbit 512k X 8 Static Ram
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Cypress Semiconductor Corporation
Document #: 38-05442 Rev. *F
Features
Product Portfolio
Notes
CY62148ELL
CY62148ELL
1. For best practice recommendations, refer to the Cypress application note “System Design Guidelines” at http://www.cypress.com.
2. SOIC package is available only in 55 ns speed bin.
3. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
• Available in Pb-free 32-pin TSOP II and 32-pin SOIC
• Very high speed: 45 ns
• Voltage range: 4.5V–5.5V
• Pin compatible with CY62148B
• Ultra low standby power
• Ultra low active power
• Easy memory expansion with CE, and OE features
• Automatic power down when deselected
• CMOS for optimum speed and power
— Typical standby current: 1 µA
— Maximum standby current: 7 µA (Industrial)
— Typical active current: 2.0 mA @ f = 1 MHz
packages
Product
TSOP II
SOIC
Ind’l/Auto-A
Range
Ind’l
Min
4.5
4.5
V
CC
198 Champion Court
Typ
Range (V)
5.0
5.0
[3]
[2]
Max
5.5
5.5
Functional Description
The CY62148E is a high performance CMOS static RAM
organized as 512K words by 8 bits. This device features
advanced circuit design to provide ultra low active current.
This is ideal for providing More Battery Life™ (MoBL
portable applications such as cellular telephones. The device
also has an automatic power down feature that significantly
reduces power consumption when addresses are not toggling.
Placing the device into standby mode reduces power
consumption by more than 99% when deselected (CE HIGH).
The eight input and output pins (IO
in a high impedance state when:
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. Data on the eight IO pins (IO
is then written into the location specified on the address pins
(A
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing Write Enable (WE) HIGH.
Under these conditions, the contents of the memory location
specified by the address pins appear on the IO pins.
• Deselected (CE HIGH)
• Outputs are disabled (OE HIGH)
• Write operation is active (CE LOW and WE LOW)
0
Speed
4-Mbit (512K x 8) Static RAM
(ns)
through A
45
55
Typ
San Jose
f = 1MHz
2
2
18
[3]
).
Operating I
Max
,
2.5
2.5
CA 95134-1709
Power Dissipation
CC
Typ
CC
15
15
= V
f = f
[1]
(mA)
[3]
CY62148E MoBL
CC(typ)
max
0
Max
, T
Revised March 28, 2007
20
20
through IO
A
= 25°C.
Standby I
Typ
1
1
0
408-943-2600
7
[3]
through IO
) are placed
SB2
Max
7
7
®
(µA)
) in
®
7
)
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cy62148e Summary of contents

Page 1

... Document #: 38-05442 Rev. *F 4-Mbit (512K x 8) Static RAM Functional Description The CY62148E is a high performance CMOS static RAM organized as 512K words by 8 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL portable applications such as cellular telephones ...

Page 2

... ® CY62148E MoBL Page [+] Feedback ...

Page 3

... CC CC(max) Test Conditions T = 25° MHz CC(typ) (min) and 200 µs wait time after V CC spec. Other inputs can be left floating. SB2 CY62148E MoBL [5, 6] ............ –0. 0.5V) CCmax Ambient [ Temperature –40°C to +85°C 4.5V to 5.5V [ Unit ...

Page 4

... V – 0. < 0. DATA RETENTION MODE V V > 2.0V CC(min CDR > 100 µs or stable at V > 100 µ CC(min) CC(min) ® CY62148E MoBL SOIC TSOP II Unit Package Package °C °C 90% 10% Fall Time = 1 V/ns Unit Ω Ω Ω V [3] ...

Page 5

... Test Loads and Waveforms” on page OH is less than less than t , and t HZCE LZCE HZOE LZOE . All signals must be ACTIVE to initiate a write and any of these signals can IL ® CY62148E MoBL [ Unit Min Max ...

Page 6

... During this period, the IOs are in output state and input signals must not be applied. Document #: 38-05442 Rev. *F [16, 17 OHA DOE DATA VALID 50% [19, 20 SCE PWE t SD DATA VALID ® CY62148E MoBL DATA VALID t HZOE t HZCE HIGH IMPEDANCE 50 Page [+] Feedback ...

Page 7

... AW t PWE t SD DATA VALID [20 SCE PWE t SD DATA VALID IO’s Mode Deselect/Power down Read Write Selected, Outputs Disabled ® CY62148E MoBL LZWE Power Standby ( Active ( Active ( Active ( Page ...

Page 8

... Figure 1. 32-pin TSOP II, 51-85095 Document #: 38-05442 Rev. *F Package Package Type Diagram 51-85095 32-pin Thin Small Outline Package II (Pb-free) 51-85081 32-pin Small Outline Integrated Circuit (Pb-free) 51-85081 32-pin Small Outline Integrated Circuit (Pb-free) ® CY62148E MoBL Operating Range Industrial Industrial Automotive-A 51-85095-** Page [+] Feedback ...

Page 9

... Cypress against all charges. 1 0.546[13.868] 0.566[14.376] 0.440[11.176] 0.450[11.430] 32 0.006[0.152] 0.012[0.304] 0.118[2.997] MAX. 0.004[0.102] 0.004[0.102] MIN. SEATING PLANE ® CY62148E MoBL 0.047[1.193] 0.063[1.600] 0.023[0.584] 0.039[0.990] 51-85081-*B Page [+] Feedback ...

Page 10

... Changed Ordering Information to include Pb-Free Packages Changed from Preliminary to Final Changed the address of Cypress Semiconductor Corporation on Page #1 from “3901 North First Street” to “198 Champion Court” Removed 35ns Speed Bin Removed “L” version of CY62148E Changed I (Typ) value from 1 f=1 MHz CC Changed I (Max) value from ...

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