w25x32a Winbond Electronics Corp America, w25x32a Datasheet - Page 26

• Manufacturer Part Number: w25x32a
• Description: 32m-bit Serial Flash Memory With 4kb Sectors And Dual Output Spi
• Manufacturer: Winbond Electronics Corp America

W25X32A
11.2.13 Chip Erase (C7h)
The Chip Erase instruction sets all memory within the device to the erased state of all 1s (FFh). A Write
Enable instruction must be executed before the device will accept the Chip Erase Instruction (Status
Register bit WEL must equal 1). The instruction is initiated by driving the /CS pin low and shifting the
instruction code “C7h”. The Chip Erase instruction sequence is shown in figure 14.
The /CS pin must be driven high after the eighth bit has been latched. If this is not done the Chip Erase
instruction will not be executed. After /CS is driven high, the self-timed Chip Erase instruction will
commence for a time duration of t
(See AC Characteristics). While the Chip Erase cycle is in progress,
CE
the Read Status Register instruction may still be accessed to check the status of the BUSY bit. The
BUSY bit is a 1 during the Chip Erase cycle and becomes a 0 when finished and the device is ready to
accept other instructions again. After the Chip Erase cycle has finished the Write Enable Latch (WEL) bit
in the Status Register is cleared to 0. The Chip Erase instruction will not be executed if any page is
protected by the Block Protect (BP2, BP1, and BP0) bits (see Status Register Memory Protection table).
Figure 14. Chip Erase Instruction Sequence Diagram
- 26 -